METHOD TO IMPROVE DATA RETENTION OF NON-VOLATILE MEMORY IN LOGIC PROCESSES

In some embodiments, the present disclosure relates to an integrated chip (IC), including a substrate, a floating gate electrode disposed over the substrate, a contact etch stop layer (CESL) structure disposed over the floating gate electrode, an insulating stack separating the floating gate electro...

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Bibliographische Detailangaben

Hauptverfasser:	Tsui, Ying Kit Felix, Chen, Shih-Hsien, Lo, Wen-Shun, Wu, Tai-Yi
Format:	Patent
Sprache:	eng
Schlagworte:	ELECTRICITY
Online-Zugang:	Volltext bestellen
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