LAYOUT FOR INTEGRATED CIRCUIT AND THE INTEGRATED CIRCUIT

LAYOUT FOR INTEGRATED CIRCUIT AND THE INTEGRATED CIRCUIT

A layout method includes disposing a first conductive path and a second conductive path across a boundary between a first layout device and a second layout device abutting the first layout device. The layout method also includes disposing a first cut layer on the first conductive path nearby the bou...

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Hauptverfasser: KAO, JERRY CHANG-JUI, ZHUANG, HUI-ZHONG, LEI, CHEOK-KEI, JIANG, ZHE-WEI, LIU, CHI-LIN, YANG, JUNGAN, LI, YUI, TSENG, CHIA-WEI, LU, CHI-YU
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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creator KAO, JERRY CHANG-JUI
ZHUANG, HUI-ZHONG
LEI, CHEOK-KEI
JIANG, ZHE-WEI
LIU, CHI-LIN
YANG, JUNGAN
LI, YUI
TSENG, CHIA-WEI
LU, CHI-YU
description A layout method includes disposing a first conductive path and a second conductive path across a boundary between a first layout device and a second layout device abutting the first layout device. The layout method also includes disposing a first cut layer on the first conductive path nearby the boundary, and disposing a second cut layer on the second conductive path nearby the boundary. The layout method also includes moving the first cut layer to align with the second cut layer.
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title LAYOUT FOR INTEGRATED CIRCUIT AND THE INTEGRATED CIRCUIT
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