CONDUCTIVITY REDUCING FEATURES IN AN INTEGRATED CIRCUIT

An integrated circuit includes two N wells from two different devices in close proximity to each other with each N well biased by two different terminals. The N wells are at least partially surrounded by P type regions that are biased by a terminal. The integrated circuit includes conductivity reduc...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Quax, Guido Wouter Willem, Zhu, Dongyong, Pan, Tingting, Cong, Feng
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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