MASKED TRAINING AND ANALYSIS WITH A MEMORY ARRAY

MASKED TRAINING AND ANALYSIS WITH A MEMORY ARRAY

Methods, systems, and devices for masked training and analysis with a memory array are described. A memory device may operate in a first mode in which a maximum transition avoidance (MTA) decoder for a memory array of the memory device is disabled. During the first mode, the memory device may couple...

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Hauptverfasser: Spirkl, Wolfgang Anton, Hein, Thomas, Rasmussen, Phillip A
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Sprache:eng
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CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Hein, Thomas
Rasmussen, Phillip A
description Methods, systems, and devices for masked training and analysis with a memory array are described. A memory device may operate in a first mode in which a maximum transition avoidance (MTA) decoder for a memory array of the memory device is disabled. During the first mode, the memory device may couple an input node of the MTA decoder with a first output node of a first decoder, such as a first pulse amplitude modulation (PAM) decoder. The memory device may operate in a second mode in which the MTA decoder for the memory array is enabled. During the second mode, the memory device may couple the input node of the MTA decoder with a second output node of a second decoder, such as a second PAM decoder.
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title MASKED TRAINING AND ANALYSIS WITH A MEMORY ARRAY
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