MEMORY ARRAY FOR STORING ODD AND EVEN DATA BITS OF DATA WORDS IN ALTERNATE SUB-BANKS TO REDUCE MULTI-BIT ERROR RATE AND RELATED METHODS

A memory array for storing odd and even data bits of data words in alternate sub-banks to reduce multi-bit error rate is disclosed. The memory array alternates odd data bits of a first plurality of data words in consecutive columns a first sub-bank of first and second memory banks and even data bits...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	KOLAR, Pramod
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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