System, Apparatus And Method For Loose Lock-Step Redundancy Power Management

In one embodiment, a processor includes a plurality of cores, at least two of which may execute redundantly, a configuration register to store a first synchronization domain indicator to indicate that a first core and a second core are associated with a first synchronization domain, and a power cont...

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Bibliographische Detailangaben

Hauptverfasser:	Rosenzweig, Nir, Aizik, Yoni, Rajwan, Doron, Weissmann, Eliezer, Rotem, Efraim
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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