OVERLAPPING DIE STACKS FOR NAND PACKAGE ARCHITECTURE

OVERLAPPING DIE STACKS FOR NAND PACKAGE ARCHITECTURE

A semiconductor device assembly includes a substrate, a first stack of semiconductor dies disposed directly over a first location on the substrate, and a second stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the pl...

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Hauptverfasser: Tai, Enyong, Wang, Li, Ng, Hong Wan, Takiar, Hem P
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator Tai, Enyong
Wang, Li
Ng, Hong Wan
Takiar, Hem P
description A semiconductor device assembly includes a substrate, a first stack of semiconductor dies disposed directly over a first location on the substrate, and a second stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. A portion of the semiconductor dies of the second stack overlaps a portion of the semiconductor dies of the first stack. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first stack and the second stack.
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title OVERLAPPING DIE STACKS FOR NAND PACKAGE ARCHITECTURE
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