PRINTED CIRCUIT BOARD
The printed circuit board according to the embodiment includes a first insulating layer; a first circuit pattern disposed on a lower surface of the first insulating layer or inside the first insulating layer; a second circuit pattern disposed on an upper surface of the first insulating layer; and a...
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creator | YOO, Do Hyuk MYEONG, Se Ho NA, Se Woong |
description | The printed circuit board according to the embodiment includes a first insulating layer; a first circuit pattern disposed on a lower surface of the first insulating layer or inside the first insulating layer; a second circuit pattern disposed on an upper surface of the first insulating layer; and a second insulating layer disposed on the upper surface of the first insulating layer and to surround the second circuit pattern; wherein the second circuit pattern is an outermost circuit pattern, wherein the second circuit pattern and the second insulating layer are disposed to protrude on the upper surface of the first insulating layer, and wherein a height of the second circuit pattern is greater than a height of the second insulating layer. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2022264750A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2022264750A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2022264750A13</originalsourceid><addsrcrecordid>eNrjZBANCPL0C3F1UXD2DHIO9QxRcPJ3DHLhYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBkZGRmYm5qYGjobGxKkCAA2tH70</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PRINTED CIRCUIT BOARD</title><source>esp@cenet</source><creator>YOO, Do Hyuk ; MYEONG, Se Ho ; NA, Se Woong</creator><creatorcontrib>YOO, Do Hyuk ; MYEONG, Se Ho ; NA, Se Woong</creatorcontrib><description>The printed circuit board according to the embodiment includes a first insulating layer; a first circuit pattern disposed on a lower surface of the first insulating layer or inside the first insulating layer; a second circuit pattern disposed on an upper surface of the first insulating layer; and a second insulating layer disposed on the upper surface of the first insulating layer and to surround the second circuit pattern; wherein the second circuit pattern is an outermost circuit pattern, wherein the second circuit pattern and the second insulating layer are disposed to protrude on the upper surface of the first insulating layer, and wherein a height of the second circuit pattern is greater than a height of the second insulating layer.</description><language>eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220818&DB=EPODOC&CC=US&NR=2022264750A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25569,76552</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220818&DB=EPODOC&CC=US&NR=2022264750A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YOO, Do Hyuk</creatorcontrib><creatorcontrib>MYEONG, Se Ho</creatorcontrib><creatorcontrib>NA, Se Woong</creatorcontrib><title>PRINTED CIRCUIT BOARD</title><description>The printed circuit board according to the embodiment includes a first insulating layer; a first circuit pattern disposed on a lower surface of the first insulating layer or inside the first insulating layer; a second circuit pattern disposed on an upper surface of the first insulating layer; and a second insulating layer disposed on the upper surface of the first insulating layer and to surround the second circuit pattern; wherein the second circuit pattern is an outermost circuit pattern, wherein the second circuit pattern and the second insulating layer are disposed to protrude on the upper surface of the first insulating layer, and wherein a height of the second circuit pattern is greater than a height of the second insulating layer.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBANCPL0C3F1UXD2DHIO9QxRcPJ3DHLhYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBkZGRmYm5qYGjobGxKkCAA2tH70</recordid><startdate>20220818</startdate><enddate>20220818</enddate><creator>YOO, Do Hyuk</creator><creator>MYEONG, Se Ho</creator><creator>NA, Se Woong</creator><scope>EVB</scope></search><sort><creationdate>20220818</creationdate><title>PRINTED CIRCUIT BOARD</title><author>YOO, Do Hyuk ; MYEONG, Se Ho ; NA, Se Woong</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2022264750A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>YOO, Do Hyuk</creatorcontrib><creatorcontrib>MYEONG, Se Ho</creatorcontrib><creatorcontrib>NA, Se Woong</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YOO, Do Hyuk</au><au>MYEONG, Se Ho</au><au>NA, Se Woong</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PRINTED CIRCUIT BOARD</title><date>2022-08-18</date><risdate>2022</risdate><abstract>The printed circuit board according to the embodiment includes a first insulating layer; a first circuit pattern disposed on a lower surface of the first insulating layer or inside the first insulating layer; a second circuit pattern disposed on an upper surface of the first insulating layer; and a second insulating layer disposed on the upper surface of the first insulating layer and to surround the second circuit pattern; wherein the second circuit pattern is an outermost circuit pattern, wherein the second circuit pattern and the second insulating layer are disposed to protrude on the upper surface of the first insulating layer, and wherein a height of the second circuit pattern is greater than a height of the second insulating layer.</abstract><oa>free_for_read</oa></addata></record> |
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recordid | cdi_epo_espacenet_US2022264750A1 |
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subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS |
title | PRINTED CIRCUIT BOARD |
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