CHARGE PUMP ARCHITECTURE
Disclosed herein is a charge pump architecture in which boosting capacitors of adjacent stages are connected only by NMOS type transistors and comprising a first stage receiving a first voltage and outputting an internal voltage; a second stage receiving the internal voltage and outputting a second...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | PASSERINI, Marco AKER, Onur |
| description | Disclosed herein is a charge pump architecture in which boosting capacitors of adjacent stages are connected only by NMOS type transistors and comprising a first stage receiving a first voltage and outputting an internal voltage; a second stage receiving the internal voltage and outputting a second voltage at an output terminal, and an auxiliary stage connected to the output terminal, the first stage and second stage including a first type of MOS transistors transferring the voltage from input node internal boosting nodes and being cross-coupled; a second type of MOS transistors with their gate biased by a third type of MOS transistors and fourth type of MOS transistors; the third type of MOS transistors connecting the gate of the second type of MOS transistors; and the fourth type of MOS transistors connecting the gate of the second type of MOS transistors |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2022255423A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2022255423A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2022255423A13</originalsourceid><addsrcrecordid>eNrjZJBw9nAMcndVCAj1DVBwDHL28AxxdQ4JDXLlYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBkZGRqamJkbGjobGxKkCAG8qIJg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>CHARGE PUMP ARCHITECTURE</title><source>esp@cenet</source><creator>PASSERINI, Marco ; AKER, Onur</creator><creatorcontrib>PASSERINI, Marco ; AKER, Onur</creatorcontrib><description>Disclosed herein is a charge pump architecture in which boosting capacitors of adjacent stages are connected only by NMOS type transistors and comprising a first stage receiving a first voltage and outputting an internal voltage; a second stage receiving the internal voltage and outputting a second voltage at an output terminal, and an auxiliary stage connected to the output terminal, the first stage and second stage including a first type of MOS transistors transferring the voltage from input node internal boosting nodes and being cross-coupled; a second type of MOS transistors with their gate biased by a third type of MOS transistors and fourth type of MOS transistors; the third type of MOS transistors connecting the gate of the second type of MOS transistors; and the fourth type of MOS transistors connecting the gate of the second type of MOS transistors</description><language>eng</language><subject>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS ; CONTROL OR REGULATION THEREOF ; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER ; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ; ELECTRICITY ; GENERATION</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220811&DB=EPODOC&CC=US&NR=2022255423A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220811&DB=EPODOC&CC=US&NR=2022255423A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>PASSERINI, Marco</creatorcontrib><creatorcontrib>AKER, Onur</creatorcontrib><title>CHARGE PUMP ARCHITECTURE</title><description>Disclosed herein is a charge pump architecture in which boosting capacitors of adjacent stages are connected only by NMOS type transistors and comprising a first stage receiving a first voltage and outputting an internal voltage; a second stage receiving the internal voltage and outputting a second voltage at an output terminal, and an auxiliary stage connected to the output terminal, the first stage and second stage including a first type of MOS transistors transferring the voltage from input node internal boosting nodes and being cross-coupled; a second type of MOS transistors with their gate biased by a third type of MOS transistors and fourth type of MOS transistors; the third type of MOS transistors connecting the gate of the second type of MOS transistors; and the fourth type of MOS transistors connecting the gate of the second type of MOS transistors</description><subject>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS</subject><subject>CONTROL OR REGULATION THEREOF</subject><subject>CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER</subject><subject>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</subject><subject>ELECTRICITY</subject><subject>GENERATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJBw9nAMcndVCAj1DVBwDHL28AxxdQ4JDXLlYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBkZGRqamJkbGjobGxKkCAG8qIJg</recordid><startdate>20220811</startdate><enddate>20220811</enddate><creator>PASSERINI, Marco</creator><creator>AKER, Onur</creator><scope>EVB</scope></search><sort><creationdate>20220811</creationdate><title>CHARGE PUMP ARCHITECTURE</title><author>PASSERINI, Marco ; AKER, Onur</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2022255423A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS</topic><topic>CONTROL OR REGULATION THEREOF</topic><topic>CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER</topic><topic>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</topic><topic>ELECTRICITY</topic><topic>GENERATION</topic><toplevel>online_resources</toplevel><creatorcontrib>PASSERINI, Marco</creatorcontrib><creatorcontrib>AKER, Onur</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>PASSERINI, Marco</au><au>AKER, Onur</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>CHARGE PUMP ARCHITECTURE</title><date>2022-08-11</date><risdate>2022</risdate><abstract>Disclosed herein is a charge pump architecture in which boosting capacitors of adjacent stages are connected only by NMOS type transistors and comprising a first stage receiving a first voltage and outputting an internal voltage; a second stage receiving the internal voltage and outputting a second voltage at an output terminal, and an auxiliary stage connected to the output terminal, the first stage and second stage including a first type of MOS transistors transferring the voltage from input node internal boosting nodes and being cross-coupled; a second type of MOS transistors with their gate biased by a third type of MOS transistors and fourth type of MOS transistors; the third type of MOS transistors connecting the gate of the second type of MOS transistors; and the fourth type of MOS transistors connecting the gate of the second type of MOS transistors</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US2022255423A1 |
| source | esp@cenet |
| subjects | APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS CONTROL OR REGULATION THEREOF CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ELECTRICITY GENERATION |
| title | CHARGE PUMP ARCHITECTURE |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-02T09%3A17%3A09IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=PASSERINI,%20Marco&rft.date=2022-08-11&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2022255423A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |