HIGH VOLTAGE ISOLATION BARRIER WITH ELECTRIC OVERSTRESS INTEGRITY

An electronic device comprises a multilevel metallization structure over a semiconductor layer and including a first region, a second region, a pre-metal level on the semiconductor layer, and N metallization structure levels over the pre-metal level, N being greater than 3. The electronic device als...

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Bibliographische Detailangaben
1. Verfasser: West, Jeffrey A
Format: Patent
Sprache:eng
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