SEMICONDUCTOR TEST APPARATUS AND SEMICONDUCTOR TEST METHOD

A semiconductor test apparatus includes a chuck top on which a semiconductor wafer is mounted, and contact probes that contact measurement points of semiconductor chips formed on the semiconductor wafer, the chuck top includes a conductor that contacts a lower surface of the semiconductor wafer, a m...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Ueda, Yoshiyuki, Noguchi, Takaya
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Ueda, Yoshiyuki
Noguchi, Takaya
description A semiconductor test apparatus includes a chuck top on which a semiconductor wafer is mounted, and contact probes that contact measurement points of semiconductor chips formed on the semiconductor wafer, the chuck top includes a conductor that contacts a lower surface of the semiconductor wafer, a mounting table arranged below the conductor, and a first vacuum tube and a second vacuum tube connected to the mounting table, the conductor has a plurality of suction holes that are arranged in a spiral form in top view, in the mounting table, a flow pass communicating with the plurality of suction holes and having a spiral form in top view, the first vacuum tube is connected to an inner circumference portion of the flow pass, and the second vacuum tube is connected to an outer circumference portion of the flow pass.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2022244292A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2022244292A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2022244292A13</originalsourceid><addsrcrecordid>eNrjZLAKdvX1dPb3cwl1DvEPUghxDQ5RcAwIcAxyDAkNVnD0c1HAosDXNcTD34WHgTUtMac4lRdKczMou7mGOHvophbkx6cWFyQmp-allsSHBhsZGBkZmZgYWRo5GhoTpwoAij8qUg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR TEST APPARATUS AND SEMICONDUCTOR TEST METHOD</title><source>esp@cenet</source><creator>Ueda, Yoshiyuki ; Noguchi, Takaya</creator><creatorcontrib>Ueda, Yoshiyuki ; Noguchi, Takaya</creatorcontrib><description>A semiconductor test apparatus includes a chuck top on which a semiconductor wafer is mounted, and contact probes that contact measurement points of semiconductor chips formed on the semiconductor wafer, the chuck top includes a conductor that contacts a lower surface of the semiconductor wafer, a mounting table arranged below the conductor, and a first vacuum tube and a second vacuum tube connected to the mounting table, the conductor has a plurality of suction holes that are arranged in a spiral form in top view, in the mounting table, a flow pass communicating with the plurality of suction holes and having a spiral form in top view, the first vacuum tube is connected to an inner circumference portion of the flow pass, and the second vacuum tube is connected to an outer circumference portion of the flow pass.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; SEMICONDUCTOR DEVICES ; TESTING</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220804&amp;DB=EPODOC&amp;CC=US&amp;NR=2022244292A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220804&amp;DB=EPODOC&amp;CC=US&amp;NR=2022244292A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Ueda, Yoshiyuki</creatorcontrib><creatorcontrib>Noguchi, Takaya</creatorcontrib><title>SEMICONDUCTOR TEST APPARATUS AND SEMICONDUCTOR TEST METHOD</title><description>A semiconductor test apparatus includes a chuck top on which a semiconductor wafer is mounted, and contact probes that contact measurement points of semiconductor chips formed on the semiconductor wafer, the chuck top includes a conductor that contacts a lower surface of the semiconductor wafer, a mounting table arranged below the conductor, and a first vacuum tube and a second vacuum tube connected to the mounting table, the conductor has a plurality of suction holes that are arranged in a spiral form in top view, in the mounting table, a flow pass communicating with the plurality of suction holes and having a spiral form in top view, the first vacuum tube is connected to an inner circumference portion of the flow pass, and the second vacuum tube is connected to an outer circumference portion of the flow pass.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAKdvX1dPb3cwl1DvEPUghxDQ5RcAwIcAxyDAkNVnD0c1HAosDXNcTD34WHgTUtMac4lRdKczMou7mGOHvophbkx6cWFyQmp-allsSHBhsZGBkZmZgYWRo5GhoTpwoAij8qUg</recordid><startdate>20220804</startdate><enddate>20220804</enddate><creator>Ueda, Yoshiyuki</creator><creator>Noguchi, Takaya</creator><scope>EVB</scope></search><sort><creationdate>20220804</creationdate><title>SEMICONDUCTOR TEST APPARATUS AND SEMICONDUCTOR TEST METHOD</title><author>Ueda, Yoshiyuki ; Noguchi, Takaya</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2022244292A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>Ueda, Yoshiyuki</creatorcontrib><creatorcontrib>Noguchi, Takaya</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ueda, Yoshiyuki</au><au>Noguchi, Takaya</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR TEST APPARATUS AND SEMICONDUCTOR TEST METHOD</title><date>2022-08-04</date><risdate>2022</risdate><abstract>A semiconductor test apparatus includes a chuck top on which a semiconductor wafer is mounted, and contact probes that contact measurement points of semiconductor chips formed on the semiconductor wafer, the chuck top includes a conductor that contacts a lower surface of the semiconductor wafer, a mounting table arranged below the conductor, and a first vacuum tube and a second vacuum tube connected to the mounting table, the conductor has a plurality of suction holes that are arranged in a spiral form in top view, in the mounting table, a flow pass communicating with the plurality of suction holes and having a spiral form in top view, the first vacuum tube is connected to an inner circumference portion of the flow pass, and the second vacuum tube is connected to an outer circumference portion of the flow pass.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2022244292A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
SEMICONDUCTOR DEVICES
TESTING
title SEMICONDUCTOR TEST APPARATUS AND SEMICONDUCTOR TEST METHOD
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-12T23%3A49%3A28IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Ueda,%20Yoshiyuki&rft.date=2022-08-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2022244292A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true