Low Latency Comparator with Local Clock Circuit

A low latency comparator circuit with a local clock circuit is disclosed. A comparator circuit configured to compare a first input signal to a second input signal. The comparator circuit includes at least one regenerative latch circuit having a first and second inputs configured to receive the first...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Savoj, Jafar, Heshami, Mehrdad
Format: Patent
Sprache:eng
Schlagworte:
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