SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURING THE SAME

A semiconductor device may include active pattern, a silicon liner, an insulation layer, an isolation pattern and a transistor. The active pattern may protrude from a substrate. The silicon liner having a crystalline structure may be formed conformally on surfaces of the active pattern and the subst...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: IM, Donghyun, KIM, Jooyub, CHUNG, Chunhyung, LEE, Namhoon, YOON, Sungmi, WE, Juhyung
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator IM, Donghyun
KIM, Jooyub
CHUNG, Chunhyung
LEE, Namhoon
YOON, Sungmi
WE, Juhyung
description A semiconductor device may include active pattern, a silicon liner, an insulation layer, an isolation pattern and a transistor. The active pattern may protrude from a substrate. The silicon liner having a crystalline structure may be formed conformally on surfaces of the active pattern and the substrate. The insulation layer may be formed on the silicon liner. The isolation pattern may be formed on the insulation layer to fill a trench adjacent to the active pattern. The transistor may include a gate structure and impurity regions. The gate structure may be disposed on the silicon liner, and the impurity regions may be formed at the silicon liner and the active pattern adjacent to both sides of the gate structure.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2022189963A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2022189963A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2022189963A13</originalsourceid><addsrcrecordid>eNrjZLAKdvX1dPb3cwl1DvEPUnBxDfN0dg1WcPRzUfB1DfHwd1Hwd1PwdfQLdXN0DgkN8vRzVwjxcFUIdvR15WFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgZGRoYWlpZmxo6GxsSpAgBUaSnv</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURING THE SAME</title><source>esp@cenet</source><creator>IM, Donghyun ; KIM, Jooyub ; CHUNG, Chunhyung ; LEE, Namhoon ; YOON, Sungmi ; WE, Juhyung</creator><creatorcontrib>IM, Donghyun ; KIM, Jooyub ; CHUNG, Chunhyung ; LEE, Namhoon ; YOON, Sungmi ; WE, Juhyung</creatorcontrib><description>A semiconductor device may include active pattern, a silicon liner, an insulation layer, an isolation pattern and a transistor. The active pattern may protrude from a substrate. The silicon liner having a crystalline structure may be formed conformally on surfaces of the active pattern and the substrate. The insulation layer may be formed on the silicon liner. The isolation pattern may be formed on the insulation layer to fill a trench adjacent to the active pattern. The transistor may include a gate structure and impurity regions. The gate structure may be disposed on the silicon liner, and the impurity regions may be formed at the silicon liner and the active pattern adjacent to both sides of the gate structure.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220616&amp;DB=EPODOC&amp;CC=US&amp;NR=2022189963A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220616&amp;DB=EPODOC&amp;CC=US&amp;NR=2022189963A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>IM, Donghyun</creatorcontrib><creatorcontrib>KIM, Jooyub</creatorcontrib><creatorcontrib>CHUNG, Chunhyung</creatorcontrib><creatorcontrib>LEE, Namhoon</creatorcontrib><creatorcontrib>YOON, Sungmi</creatorcontrib><creatorcontrib>WE, Juhyung</creatorcontrib><title>SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURING THE SAME</title><description>A semiconductor device may include active pattern, a silicon liner, an insulation layer, an isolation pattern and a transistor. The active pattern may protrude from a substrate. The silicon liner having a crystalline structure may be formed conformally on surfaces of the active pattern and the substrate. The insulation layer may be formed on the silicon liner. The isolation pattern may be formed on the insulation layer to fill a trench adjacent to the active pattern. The transistor may include a gate structure and impurity regions. The gate structure may be disposed on the silicon liner, and the impurity regions may be formed at the silicon liner and the active pattern adjacent to both sides of the gate structure.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAKdvX1dPb3cwl1DvEPUnBxDfN0dg1WcPRzUfB1DfHwd1Hwd1PwdfQLdXN0DgkN8vRzVwjxcFUIdvR15WFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgZGRoYWlpZmxo6GxsSpAgBUaSnv</recordid><startdate>20220616</startdate><enddate>20220616</enddate><creator>IM, Donghyun</creator><creator>KIM, Jooyub</creator><creator>CHUNG, Chunhyung</creator><creator>LEE, Namhoon</creator><creator>YOON, Sungmi</creator><creator>WE, Juhyung</creator><scope>EVB</scope></search><sort><creationdate>20220616</creationdate><title>SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURING THE SAME</title><author>IM, Donghyun ; KIM, Jooyub ; CHUNG, Chunhyung ; LEE, Namhoon ; YOON, Sungmi ; WE, Juhyung</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2022189963A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>IM, Donghyun</creatorcontrib><creatorcontrib>KIM, Jooyub</creatorcontrib><creatorcontrib>CHUNG, Chunhyung</creatorcontrib><creatorcontrib>LEE, Namhoon</creatorcontrib><creatorcontrib>YOON, Sungmi</creatorcontrib><creatorcontrib>WE, Juhyung</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>IM, Donghyun</au><au>KIM, Jooyub</au><au>CHUNG, Chunhyung</au><au>LEE, Namhoon</au><au>YOON, Sungmi</au><au>WE, Juhyung</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURING THE SAME</title><date>2022-06-16</date><risdate>2022</risdate><abstract>A semiconductor device may include active pattern, a silicon liner, an insulation layer, an isolation pattern and a transistor. The active pattern may protrude from a substrate. The silicon liner having a crystalline structure may be formed conformally on surfaces of the active pattern and the substrate. The insulation layer may be formed on the silicon liner. The isolation pattern may be formed on the insulation layer to fill a trench adjacent to the active pattern. The transistor may include a gate structure and impurity regions. The gate structure may be disposed on the silicon liner, and the impurity regions may be formed at the silicon liner and the active pattern adjacent to both sides of the gate structure.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2022189963A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURING THE SAME
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T15%3A34%3A50IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=IM,%20Donghyun&rft.date=2022-06-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2022189963A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true