HIGH RELIABILITY POLYSILICON COMPONENTS
The present disclosure introduces, among other things, an electronic device, e.g. an integrated circuit (IC). The IC includes a semiconductor substrate comprising a first doped layer of a first conductivity type. A second doped layer of the first conductivity type is located within the first doped l...
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| creator | Higgins, Robert M Arshad, Shariq Edwards, Henry Litzmann Wu, Xiaoju Wang, Li Davis, Jonathan Philip Chatterjee, Tathagata |
| description | The present disclosure introduces, among other things, an electronic device, e.g. an integrated circuit (IC). The IC includes a semiconductor substrate comprising a first doped layer of a first conductivity type. A second doped layer of the first conductivity type is located within the first doped layer. The second doped layer has first and second layer portions with a greater dopant concentration than the first doped layer, with the first layer portion being spaced apart from the second layer portion laterally with respect to a surface of the substrate. The IC further includes a lightly doped portion of the first doped layer, the lightly doped portion being located between the first and second layer portions. A dielectric isolation structure is located between the first and second layer portions, and directly contacts the lightly doped portion. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2022189949A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2022189949A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2022189949A13</originalsourceid><addsrcrecordid>eNrjZFD38HT3UAhy9fF0dPL08QyJVAjw94kMBjKd_f0UnP19A_z9XP1CgnkYWNMSc4pTeaE0N4Oym2uIs4duakF-fGpxQWJyal5qSXxosJGBkZGhhaWliaWjoTFxqgCZCSUz</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>HIGH RELIABILITY POLYSILICON COMPONENTS</title><source>esp@cenet</source><creator>Higgins, Robert M ; Arshad, Shariq ; Edwards, Henry Litzmann ; Wu, Xiaoju ; Wang, Li ; Davis, Jonathan Philip ; Chatterjee, Tathagata</creator><creatorcontrib>Higgins, Robert M ; Arshad, Shariq ; Edwards, Henry Litzmann ; Wu, Xiaoju ; Wang, Li ; Davis, Jonathan Philip ; Chatterjee, Tathagata</creatorcontrib><description>The present disclosure introduces, among other things, an electronic device, e.g. an integrated circuit (IC). The IC includes a semiconductor substrate comprising a first doped layer of a first conductivity type. A second doped layer of the first conductivity type is located within the first doped layer. The second doped layer has first and second layer portions with a greater dopant concentration than the first doped layer, with the first layer portion being spaced apart from the second layer portion laterally with respect to a surface of the substrate. The IC further includes a lightly doped portion of the first doped layer, the lightly doped portion being located between the first and second layer portions. A dielectric isolation structure is located between the first and second layer portions, and directly contacts the lightly doped portion.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; PHYSICS ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220616&DB=EPODOC&CC=US&NR=2022189949A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25568,76551</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220616&DB=EPODOC&CC=US&NR=2022189949A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Higgins, Robert M</creatorcontrib><creatorcontrib>Arshad, Shariq</creatorcontrib><creatorcontrib>Edwards, Henry Litzmann</creatorcontrib><creatorcontrib>Wu, Xiaoju</creatorcontrib><creatorcontrib>Wang, Li</creatorcontrib><creatorcontrib>Davis, Jonathan Philip</creatorcontrib><creatorcontrib>Chatterjee, Tathagata</creatorcontrib><title>HIGH RELIABILITY POLYSILICON COMPONENTS</title><description>The present disclosure introduces, among other things, an electronic device, e.g. an integrated circuit (IC). The IC includes a semiconductor substrate comprising a first doped layer of a first conductivity type. A second doped layer of the first conductivity type is located within the first doped layer. The second doped layer has first and second layer portions with a greater dopant concentration than the first doped layer, with the first layer portion being spaced apart from the second layer portion laterally with respect to a surface of the substrate. The IC further includes a lightly doped portion of the first doped layer, the lightly doped portion being located between the first and second layer portions. A dielectric isolation structure is located between the first and second layer portions, and directly contacts the lightly doped portion.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFD38HT3UAhy9fF0dPL08QyJVAjw94kMBjKd_f0UnP19A_z9XP1CgnkYWNMSc4pTeaE0N4Oym2uIs4duakF-fGpxQWJyal5qSXxosJGBkZGhhaWliaWjoTFxqgCZCSUz</recordid><startdate>20220616</startdate><enddate>20220616</enddate><creator>Higgins, Robert M</creator><creator>Arshad, Shariq</creator><creator>Edwards, Henry Litzmann</creator><creator>Wu, Xiaoju</creator><creator>Wang, Li</creator><creator>Davis, Jonathan Philip</creator><creator>Chatterjee, Tathagata</creator><scope>EVB</scope></search><sort><creationdate>20220616</creationdate><title>HIGH RELIABILITY POLYSILICON COMPONENTS</title><author>Higgins, Robert M ; Arshad, Shariq ; Edwards, Henry Litzmann ; Wu, Xiaoju ; Wang, Li ; Davis, Jonathan Philip ; Chatterjee, Tathagata</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2022189949A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Higgins, Robert M</creatorcontrib><creatorcontrib>Arshad, Shariq</creatorcontrib><creatorcontrib>Edwards, Henry Litzmann</creatorcontrib><creatorcontrib>Wu, Xiaoju</creatorcontrib><creatorcontrib>Wang, Li</creatorcontrib><creatorcontrib>Davis, Jonathan Philip</creatorcontrib><creatorcontrib>Chatterjee, Tathagata</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Higgins, Robert M</au><au>Arshad, Shariq</au><au>Edwards, Henry Litzmann</au><au>Wu, Xiaoju</au><au>Wang, Li</au><au>Davis, Jonathan Philip</au><au>Chatterjee, Tathagata</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>HIGH RELIABILITY POLYSILICON COMPONENTS</title><date>2022-06-16</date><risdate>2022</risdate><abstract>The present disclosure introduces, among other things, an electronic device, e.g. an integrated circuit (IC). The IC includes a semiconductor substrate comprising a first doped layer of a first conductivity type. A second doped layer of the first conductivity type is located within the first doped layer. The second doped layer has first and second layer portions with a greater dopant concentration than the first doped layer, with the first layer portion being spaced apart from the second layer portion laterally with respect to a surface of the substrate. The IC further includes a lightly doped portion of the first doped layer, the lightly doped portion being located between the first and second layer portions. A dielectric isolation structure is located between the first and second layer portions, and directly contacts the lightly doped portion.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY PHYSICS SEMICONDUCTOR DEVICES |
| title | HIGH RELIABILITY POLYSILICON COMPONENTS |
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