MEMORIES FOR CALIBRATING SENSING OF MEMORY CELL DATA STATES

Memory might include a controller configured to determine, for each sense circuit of a plurality of sense circuits, a respective plurality of first logic levels for that sense circuit while capacitively coupling a respective plurality of voltage levels to its respective sense node, to determine a pa...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Valeri, Gianfranco, Moschiano, Violante, Di-Francesco, Walter
Format: Patent
Sprache:eng
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