SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND MASSIVE DATA STORAGE SYSTEM INCLUDING THE SAME

A semiconductor device includes a gate electrode structure, a channel, first division patterns, and a second division pattern. The gate electrode structure is on a substrate, and includes gate electrodes stacked in a first direction perpendicular to the substrate. Each gate electrode extends in a se...

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Hauptverfasser: JUNG, Kwangyoung, HAN, Jeehoon, BAEK, Jaebok, CHUNG, Giyong
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creator JUNG, Kwangyoung
HAN, Jeehoon
BAEK, Jaebok
CHUNG, Giyong
description A semiconductor device includes a gate electrode structure, a channel, first division patterns, and a second division pattern. The gate electrode structure is on a substrate, and includes gate electrodes stacked in a first direction perpendicular to the substrate. Each gate electrode extends in a second direction parallel to the substrate. The channel extends in the first direction through the gate electrode structure. The first division patterns are spaced apart from each other in the second direction, and each first division pattern extends in the second direction through the gate electrode structure. The second division pattern is between the first division patterns, and the second division pattern and the first division patterns together divide a first gate electrode in a third direction parallel to the substrate and crossing the second direction. The second division pattern has an outer contour that is a curve in a plan view.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2022139945A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2022139945A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2022139945A13</originalsourceid><addsrcrecordid>eNqNi7EKwjAQQLs4iPoPB64KttWh45Fc24BJoHcpOJUicRDRQv1_zODg6PSG994yuzNZo7zTQYnvQFNvFO3AkrReg6_Bogs1KgmdcQ1IS8BoU4FOJ8dsegKNgsDpxybpCwtZME6dg_591tniNj7muPlylW1rEtXu4_Qa4jyN1_iM7yFwcSiKvKyq4wnz8r_qAzrRNso</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND MASSIVE DATA STORAGE SYSTEM INCLUDING THE SAME</title><source>esp@cenet</source><creator>JUNG, Kwangyoung ; HAN, Jeehoon ; BAEK, Jaebok ; CHUNG, Giyong</creator><creatorcontrib>JUNG, Kwangyoung ; HAN, Jeehoon ; BAEK, Jaebok ; CHUNG, Giyong</creatorcontrib><description>A semiconductor device includes a gate electrode structure, a channel, first division patterns, and a second division pattern. The gate electrode structure is on a substrate, and includes gate electrodes stacked in a first direction perpendicular to the substrate. Each gate electrode extends in a second direction parallel to the substrate. The channel extends in the first direction through the gate electrode structure. The first division patterns are spaced apart from each other in the second direction, and each first division pattern extends in the second direction through the gate electrode structure. The second division pattern is between the first division patterns, and the second division pattern and the first division patterns together divide a first gate electrode in a third direction parallel to the substrate and crossing the second direction. The second division pattern has an outer contour that is a curve in a plan view.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220505&amp;DB=EPODOC&amp;CC=US&amp;NR=2022139945A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220505&amp;DB=EPODOC&amp;CC=US&amp;NR=2022139945A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>JUNG, Kwangyoung</creatorcontrib><creatorcontrib>HAN, Jeehoon</creatorcontrib><creatorcontrib>BAEK, Jaebok</creatorcontrib><creatorcontrib>CHUNG, Giyong</creatorcontrib><title>SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND MASSIVE DATA STORAGE SYSTEM INCLUDING THE SAME</title><description>A semiconductor device includes a gate electrode structure, a channel, first division patterns, and a second division pattern. The gate electrode structure is on a substrate, and includes gate electrodes stacked in a first direction perpendicular to the substrate. Each gate electrode extends in a second direction parallel to the substrate. The channel extends in the first direction through the gate electrode structure. The first division patterns are spaced apart from each other in the second direction, and each first division pattern extends in the second direction through the gate electrode structure. The second division pattern is between the first division patterns, and the second division pattern and the first division patterns together divide a first gate electrode in a third direction parallel to the substrate and crossing the second direction. The second division pattern has an outer contour that is a curve in a plan view.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNi7EKwjAQQLs4iPoPB64KttWh45Fc24BJoHcpOJUicRDRQv1_zODg6PSG994yuzNZo7zTQYnvQFNvFO3AkrReg6_Bogs1KgmdcQ1IS8BoU4FOJ8dsegKNgsDpxybpCwtZME6dg_591tniNj7muPlylW1rEtXu4_Qa4jyN1_iM7yFwcSiKvKyq4wnz8r_qAzrRNso</recordid><startdate>20220505</startdate><enddate>20220505</enddate><creator>JUNG, Kwangyoung</creator><creator>HAN, Jeehoon</creator><creator>BAEK, Jaebok</creator><creator>CHUNG, Giyong</creator><scope>EVB</scope></search><sort><creationdate>20220505</creationdate><title>SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND MASSIVE DATA STORAGE SYSTEM INCLUDING THE SAME</title><author>JUNG, Kwangyoung ; HAN, Jeehoon ; BAEK, Jaebok ; CHUNG, Giyong</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2022139945A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>JUNG, Kwangyoung</creatorcontrib><creatorcontrib>HAN, Jeehoon</creatorcontrib><creatorcontrib>BAEK, Jaebok</creatorcontrib><creatorcontrib>CHUNG, Giyong</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>JUNG, Kwangyoung</au><au>HAN, Jeehoon</au><au>BAEK, Jaebok</au><au>CHUNG, Giyong</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND MASSIVE DATA STORAGE SYSTEM INCLUDING THE SAME</title><date>2022-05-05</date><risdate>2022</risdate><abstract>A semiconductor device includes a gate electrode structure, a channel, first division patterns, and a second division pattern. The gate electrode structure is on a substrate, and includes gate electrodes stacked in a first direction perpendicular to the substrate. Each gate electrode extends in a second direction parallel to the substrate. The channel extends in the first direction through the gate electrode structure. The first division patterns are spaced apart from each other in the second direction, and each first division pattern extends in the second direction through the gate electrode structure. The second division pattern is between the first division patterns, and the second division pattern and the first division patterns together divide a first gate electrode in a third direction parallel to the substrate and crossing the second direction. The second division pattern has an outer contour that is a curve in a plan view.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND MASSIVE DATA STORAGE SYSTEM INCLUDING THE SAME
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-29T02%3A11%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=JUNG,%20Kwangyoung&rft.date=2022-05-05&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2022139945A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true