MAINTAINING DOMAIN COHERENCE STATES INCLUDING DOMAIN STATE NO-OWNED (DSN) IN PROCESSOR-BASED DEVICES
Maintaining domain coherence states including Domain State No-Owned (DSN) in processor-based devices is disclosed. In this regard, a processor-based device provides multiple processing elements (PEs) organized into multiple domains, each containing one or more PEs and a local ordering point circuit...
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creator | PANAVICH, Jason ROBINSON, Eric Francis MITCHELL, Michael B MAGILL, Kevin Neal WILSON, Michael P BACHAND, Derek |
description | Maintaining domain coherence states including Domain State No-Owned (DSN) in processor-based devices is disclosed. In this regard, a processor-based device provides multiple processing elements (PEs) organized into multiple domains, each containing one or more PEs and a local ordering point circuit (LOP). The processor-based device supports domain coherence states for coherence granules cached by the PEs within a given domain. The domain coherence states include a DSN domain coherence state, which indicates that a coherence granule is not cached within a shared modified state within any domain. In some embodiments, upon receiving a request for a read access to a coherence granule, a system ordering point circuit (SOP) determines that the coherence granule is cached in the DSN domain coherence state within a domain of the plurality of domains, and can safely read the coherence granule from the system memory to satisfy the read access if necessary. |
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In this regard, a processor-based device provides multiple processing elements (PEs) organized into multiple domains, each containing one or more PEs and a local ordering point circuit (LOP). The processor-based device supports domain coherence states for coherence granules cached by the PEs within a given domain. The domain coherence states include a DSN domain coherence state, which indicates that a coherence granule is not cached within a shared modified state within any domain. In some embodiments, upon receiving a request for a read access to a coherence granule, a system ordering point circuit (SOP) determines that the coherence granule is cached in the DSN domain coherence state within a domain of the plurality of domains, and can safely read the coherence granule from the system memory to satisfy the read access if necessary.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220324&DB=EPODOC&CC=US&NR=2022091979A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25547,76298</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220324&DB=EPODOC&CC=US&NR=2022091979A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>PANAVICH, Jason</creatorcontrib><creatorcontrib>ROBINSON, Eric Francis</creatorcontrib><creatorcontrib>MITCHELL, Michael B</creatorcontrib><creatorcontrib>MAGILL, Kevin Neal</creatorcontrib><creatorcontrib>WILSON, Michael P</creatorcontrib><creatorcontrib>BACHAND, Derek</creatorcontrib><title>MAINTAINING DOMAIN COHERENCE STATES INCLUDING DOMAIN STATE NO-OWNED (DSN) IN PROCESSOR-BASED DEVICES</title><description>Maintaining domain coherence states including Domain State No-Owned (DSN) in processor-based devices is disclosed. In this regard, a processor-based device provides multiple processing elements (PEs) organized into multiple domains, each containing one or more PEs and a local ordering point circuit (LOP). The processor-based device supports domain coherence states for coherence granules cached by the PEs within a given domain. The domain coherence states include a DSN domain coherence state, which indicates that a coherence granule is not cached within a shared modified state within any domain. In some embodiments, upon receiving a request for a read access to a coherence granule, a system ordering point circuit (SOP) determines that the coherence granule is cached in the DSN domain coherence state within a domain of the plurality of domains, and can safely read the coherence granule from the system memory to satisfy the read access if necessary.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZEjxdfT0CwFiTz93BRd_EE_B2d_DNcjVz9lVITjEMcQ1WMHTz9kn1AVJBVhcwc9f1z_cz9VFQcMl2E8TqEohIMjf2TU42D9I18kxGCjh4hrmCRTgYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBkZGBpaGluaWjobGxKkCAPw2NTE</recordid><startdate>20220324</startdate><enddate>20220324</enddate><creator>PANAVICH, Jason</creator><creator>ROBINSON, Eric Francis</creator><creator>MITCHELL, Michael B</creator><creator>MAGILL, Kevin Neal</creator><creator>WILSON, Michael P</creator><creator>BACHAND, Derek</creator><scope>EVB</scope></search><sort><creationdate>20220324</creationdate><title>MAINTAINING DOMAIN COHERENCE STATES INCLUDING DOMAIN STATE NO-OWNED (DSN) IN PROCESSOR-BASED DEVICES</title><author>PANAVICH, Jason ; ROBINSON, Eric Francis ; MITCHELL, Michael B ; MAGILL, Kevin Neal ; WILSON, Michael P ; BACHAND, Derek</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2022091979A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>PANAVICH, Jason</creatorcontrib><creatorcontrib>ROBINSON, Eric Francis</creatorcontrib><creatorcontrib>MITCHELL, Michael B</creatorcontrib><creatorcontrib>MAGILL, Kevin Neal</creatorcontrib><creatorcontrib>WILSON, Michael P</creatorcontrib><creatorcontrib>BACHAND, Derek</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>PANAVICH, Jason</au><au>ROBINSON, Eric Francis</au><au>MITCHELL, Michael B</au><au>MAGILL, Kevin Neal</au><au>WILSON, Michael P</au><au>BACHAND, Derek</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MAINTAINING DOMAIN COHERENCE STATES INCLUDING DOMAIN STATE NO-OWNED (DSN) IN PROCESSOR-BASED DEVICES</title><date>2022-03-24</date><risdate>2022</risdate><abstract>Maintaining domain coherence states including Domain State No-Owned (DSN) in processor-based devices is disclosed. In this regard, a processor-based device provides multiple processing elements (PEs) organized into multiple domains, each containing one or more PEs and a local ordering point circuit (LOP). The processor-based device supports domain coherence states for coherence granules cached by the PEs within a given domain. The domain coherence states include a DSN domain coherence state, which indicates that a coherence granule is not cached within a shared modified state within any domain. In some embodiments, upon receiving a request for a read access to a coherence granule, a system ordering point circuit (SOP) determines that the coherence granule is cached in the DSN domain coherence state within a domain of the plurality of domains, and can safely read the coherence granule from the system memory to satisfy the read access if necessary.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | MAINTAINING DOMAIN COHERENCE STATES INCLUDING DOMAIN STATE NO-OWNED (DSN) IN PROCESSOR-BASED DEVICES |
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