BIPOLAR DECODER FOR CROSSPOINT MEMORY

A memory device including a memory array and address lines; and decoder circuitry to apply a first bias to a WL coupled to a memory cell selected for a memory operation, a second bias to a BL coupled to the selected memory cell, and one or more neutral biases to the other BLs and WLs of the memory a...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Kau, DerChang, Taub, Mase J, Shah, Ashir G, Guliani, Sandeep Kumar, Srinivasan, Balaji
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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