MEMORY EMBEDDED FULL SCAN FOR LATENT DEFECTS

A memory circuit includes input multiplexers passing one of a pair of input bits. A first input multiplexer receives a first data bit and a serial input bit. Additional input multiplexers receive either a respective pair of data (D) bits, or a write-enable (WEN) bit and a single D bit. Scan latches...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Slobodnik, Richard, Chen, Andy Wangkun, Frederick, Frank David
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS STATIC STORES TESTING
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