FABRIC INTERCONNECTION FOR MEMORY BANKS BASED ON NETWORK-ON-CHIP METHODOLOGY

Embodiments disclosed herein generally relate to the use of Network-on-Chip architecture for solid state memory structures which provide for the access of memory storage blocks via a router. As such, data may be sent to and/or from the memory storage blocks as data packets on the chip. The Network-o...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Bandic, Zvonimir Z, Vucinic, Dejan, Cargnini, Luis
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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