TRIGGERING NEXT STATE VERIFY IN PROGAM LOOP FOR NONVOLATILE MEMORY

Apparatus and methods are described to program memory cells and verify stored values programmed into the cells. The next stage in stored memory can be moved to the current verification iteration when certain conditions are met. Verification can include counting bits that exceed a voltage value for a...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Lien, Yu-Chung, Tseng, Huai-Yuan, Li, Zhuojie, Zhang, Fanglin
Format: Patent
Sprache:eng
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