SEMICONDUCTOR DEVICE INCLUDING CONTACT STRUCTURE
A semiconductor device including a contact structure is provided. The semiconductor device includes an isolation region defining a lower active region. First and second source/drain regions and first and second gate electrodes are on the lower active region. The first and second source/drain regions...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Ha, Dae Won Kim, Chang Hwa JUN, HWI CHAN |
description | A semiconductor device including a contact structure is provided. The semiconductor device includes an isolation region defining a lower active region. First and second source/drain regions and first and second gate electrodes are on the lower active region. The first and second source/drain regions are adjacent to each other. First and second gate capping patterns are on the first and second gate electrodes, respectively. First and second contact structures are on the first and second source/drain regions, respectively. A lower insulating pattern is between the first and second source/drain regions. An upper insulating pattern is between the first and second contact structures. Silicon oxide has etching selectivity with respect to an insulating material which the upper insulating pattern, the first gate capping pattern, and the second gate capping pattern are formed of. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2021375692A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2021375692A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2021375692A13</originalsourceid><addsrcrecordid>eNrjZDAIdvX1dPb3cwl1DvEPUnBxDfN0dlXw9HP2CXXx9HNXAEqFODqHKASHBAFVhAa58jCwpiXmFKfyQmluBmU31xBnD93Ugvz41OKCxOTUvNSS-NBgIwMjQ2NzUzNLI0dDY-JUAQDwVSee</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE INCLUDING CONTACT STRUCTURE</title><source>esp@cenet</source><creator>Ha, Dae Won ; Kim, Chang Hwa ; JUN, HWI CHAN</creator><creatorcontrib>Ha, Dae Won ; Kim, Chang Hwa ; JUN, HWI CHAN</creatorcontrib><description>A semiconductor device including a contact structure is provided. The semiconductor device includes an isolation region defining a lower active region. First and second source/drain regions and first and second gate electrodes are on the lower active region. The first and second source/drain regions are adjacent to each other. First and second gate capping patterns are on the first and second gate electrodes, respectively. First and second contact structures are on the first and second source/drain regions, respectively. A lower insulating pattern is between the first and second source/drain regions. An upper insulating pattern is between the first and second contact structures. Silicon oxide has etching selectivity with respect to an insulating material which the upper insulating pattern, the first gate capping pattern, and the second gate capping pattern are formed of.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20211202&DB=EPODOC&CC=US&NR=2021375692A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25569,76552</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20211202&DB=EPODOC&CC=US&NR=2021375692A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Ha, Dae Won</creatorcontrib><creatorcontrib>Kim, Chang Hwa</creatorcontrib><creatorcontrib>JUN, HWI CHAN</creatorcontrib><title>SEMICONDUCTOR DEVICE INCLUDING CONTACT STRUCTURE</title><description>A semiconductor device including a contact structure is provided. The semiconductor device includes an isolation region defining a lower active region. First and second source/drain regions and first and second gate electrodes are on the lower active region. The first and second source/drain regions are adjacent to each other. First and second gate capping patterns are on the first and second gate electrodes, respectively. First and second contact structures are on the first and second source/drain regions, respectively. A lower insulating pattern is between the first and second source/drain regions. An upper insulating pattern is between the first and second contact structures. Silicon oxide has etching selectivity with respect to an insulating material which the upper insulating pattern, the first gate capping pattern, and the second gate capping pattern are formed of.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAIdvX1dPb3cwl1DvEPUnBxDfN0dlXw9HP2CXXx9HNXAEqFODqHKASHBAFVhAa58jCwpiXmFKfyQmluBmU31xBnD93Ugvz41OKCxOTUvNSS-NBgIwMjQ2NzUzNLI0dDY-JUAQDwVSee</recordid><startdate>20211202</startdate><enddate>20211202</enddate><creator>Ha, Dae Won</creator><creator>Kim, Chang Hwa</creator><creator>JUN, HWI CHAN</creator><scope>EVB</scope></search><sort><creationdate>20211202</creationdate><title>SEMICONDUCTOR DEVICE INCLUDING CONTACT STRUCTURE</title><author>Ha, Dae Won ; Kim, Chang Hwa ; JUN, HWI CHAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2021375692A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2021</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Ha, Dae Won</creatorcontrib><creatorcontrib>Kim, Chang Hwa</creatorcontrib><creatorcontrib>JUN, HWI CHAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ha, Dae Won</au><au>Kim, Chang Hwa</au><au>JUN, HWI CHAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE INCLUDING CONTACT STRUCTURE</title><date>2021-12-02</date><risdate>2021</risdate><abstract>A semiconductor device including a contact structure is provided. The semiconductor device includes an isolation region defining a lower active region. First and second source/drain regions and first and second gate electrodes are on the lower active region. The first and second source/drain regions are adjacent to each other. First and second gate capping patterns are on the first and second gate electrodes, respectively. First and second contact structures are on the first and second source/drain regions, respectively. A lower insulating pattern is between the first and second source/drain regions. An upper insulating pattern is between the first and second contact structures. Silicon oxide has etching selectivity with respect to an insulating material which the upper insulating pattern, the first gate capping pattern, and the second gate capping pattern are formed of.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2021375692A1 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | SEMICONDUCTOR DEVICE INCLUDING CONTACT STRUCTURE |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-14T17%3A44%3A55IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Ha,%20Dae%20Won&rft.date=2021-12-02&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2021375692A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |