SEMICONDUCTOR MEMORY DEVICES INCLUDING SEPARATE UPPER AND LOWER BIT LINE SPACERS AND METHODS OF FORMING THE SAME

A volatile memory device can include a bit line structure having a vertical side wall. A lower spacer can be on a lower portion of the vertical side wall, where the lower spacer can be defined by a first thickness from the vertical side wall to an outer side wall of the lower spacer. An upper spacer...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Jang, Semyeong, Kim, Daeik, Park, Jemin, Hwang, Yoosang
Format: Patent
Sprache:eng
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