METHOD OF OPERATING SEMICONDUCTOR DEVICE

System on chip including plurality of processors including first and second processors; plurality of intellectual properties (IPs) including first and second IPs; memory interface; internal clock circuit to receive reference clock signal, generate first internal clock signal, and provide first inter...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HEO, Jung-Hun, JUNG, Hyo-Sang, JU, Sang-Wook
Format: Patent
Sprache:eng
Schlagworte:
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