STABILIZING A VOLTAGE AT A DEVICE UNDER TEST

An example method of stabilizing a voltage at a device under test (DUT) includes identifying one or more characteristics of a deviation in a first voltage to appear at the DUT. The deviation may result from a digital signal and a concomitant transient current in the DUT. The digital signal may be pa...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Deric, Anja, Messier, Jason A, Wynn, Bryce M
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Deric, Anja
Messier, Jason A
Wynn, Bryce M
description An example method of stabilizing a voltage at a device under test (DUT) includes identifying one or more characteristics of a deviation in a first voltage to appear at the DUT. The deviation may result from a digital signal and a concomitant transient current in the DUT. The digital signal may be part of a test flow to be sent over one or more test channels of automatic test equipment (ATE) to the DUT. The one or more characteristics may be identified prior to sending the test flow to the DUT. The method also includes generating a second voltage to apply to the DUT. The second voltage may be based on the one or more characteristics and being shaped to reduce the deviation.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2021132143A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2021132143A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2021132143A13</originalsourceid><addsrcrecordid>eNrjZNAJDnF08vTxjPL0c1dwVAjz9wlxdHdVcAwBclxcwzydXRVC_VxcgxRCXINDeBhY0xJzilN5oTQ3g7Kba4izh25qQX58anFBYnJqXmpJfGiwkYGRoaGxkaGJsaOhMXGqAAH4JaQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>STABILIZING A VOLTAGE AT A DEVICE UNDER TEST</title><source>esp@cenet</source><creator>Deric, Anja ; Messier, Jason A ; Wynn, Bryce M</creator><creatorcontrib>Deric, Anja ; Messier, Jason A ; Wynn, Bryce M</creatorcontrib><description>An example method of stabilizing a voltage at a device under test (DUT) includes identifying one or more characteristics of a deviation in a first voltage to appear at the DUT. The deviation may result from a digital signal and a concomitant transient current in the DUT. The digital signal may be part of a test flow to be sent over one or more test channels of automatic test equipment (ATE) to the DUT. The one or more characteristics may be identified prior to sending the test flow to the DUT. The method also includes generating a second voltage to apply to the DUT. The second voltage may be based on the one or more characteristics and being shaped to reduce the deviation.</description><language>eng</language><subject>MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; TESTING</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210506&amp;DB=EPODOC&amp;CC=US&amp;NR=2021132143A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210506&amp;DB=EPODOC&amp;CC=US&amp;NR=2021132143A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Deric, Anja</creatorcontrib><creatorcontrib>Messier, Jason A</creatorcontrib><creatorcontrib>Wynn, Bryce M</creatorcontrib><title>STABILIZING A VOLTAGE AT A DEVICE UNDER TEST</title><description>An example method of stabilizing a voltage at a device under test (DUT) includes identifying one or more characteristics of a deviation in a first voltage to appear at the DUT. The deviation may result from a digital signal and a concomitant transient current in the DUT. The digital signal may be part of a test flow to be sent over one or more test channels of automatic test equipment (ATE) to the DUT. The one or more characteristics may be identified prior to sending the test flow to the DUT. The method also includes generating a second voltage to apply to the DUT. The second voltage may be based on the one or more characteristics and being shaped to reduce the deviation.</description><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAJDnF08vTxjPL0c1dwVAjz9wlxdHdVcAwBclxcwzydXRVC_VxcgxRCXINDeBhY0xJzilN5oTQ3g7Kba4izh25qQX58anFBYnJqXmpJfGiwkYGRoaGxkaGJsaOhMXGqAAH4JaQ</recordid><startdate>20210506</startdate><enddate>20210506</enddate><creator>Deric, Anja</creator><creator>Messier, Jason A</creator><creator>Wynn, Bryce M</creator><scope>EVB</scope></search><sort><creationdate>20210506</creationdate><title>STABILIZING A VOLTAGE AT A DEVICE UNDER TEST</title><author>Deric, Anja ; Messier, Jason A ; Wynn, Bryce M</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2021132143A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2021</creationdate><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>Deric, Anja</creatorcontrib><creatorcontrib>Messier, Jason A</creatorcontrib><creatorcontrib>Wynn, Bryce M</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Deric, Anja</au><au>Messier, Jason A</au><au>Wynn, Bryce M</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>STABILIZING A VOLTAGE AT A DEVICE UNDER TEST</title><date>2021-05-06</date><risdate>2021</risdate><abstract>An example method of stabilizing a voltage at a device under test (DUT) includes identifying one or more characteristics of a deviation in a first voltage to appear at the DUT. The deviation may result from a digital signal and a concomitant transient current in the DUT. The digital signal may be part of a test flow to be sent over one or more test channels of automatic test equipment (ATE) to the DUT. The one or more characteristics may be identified prior to sending the test flow to the DUT. The method also includes generating a second voltage to apply to the DUT. The second voltage may be based on the one or more characteristics and being shaped to reduce the deviation.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2021132143A1
source esp@cenet
subjects MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
title STABILIZING A VOLTAGE AT A DEVICE UNDER TEST
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-02T23%3A57%3A43IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Deric,%20Anja&rft.date=2021-05-06&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2021132143A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true