MEMORY WITH DYNAMIC VOLTAGE SCALING
Methods and apparatuses for to memories using dynamic voltage scaling are presented. The apparatus includes memory configured to communicate with a host. The memory includes a peripheral portion and a memory array. The memory is further configured to receive, from at least one power management circu...
Gespeichert in:
Hauptverfasser: | , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | MOLL, Laurent Rene CHUN, Dexter Tamio LELOUP, Xavier Loic SUH, Jungwon LO, Michael Hawjing |
description | Methods and apparatuses for to memories using dynamic voltage scaling are presented. The apparatus includes memory configured to communicate with a host. The memory includes a peripheral portion and a memory array. The memory is further configured to receive, from at least one power management circuit, a first supply voltage and a second supply voltage. The memory further includes a switch circuit. The switch circuit is configured to selectively provide the first supply voltage and the second supply voltage to the peripheral portion. The first supply voltage is static and has a first voltage range. The second supply voltage has a low second voltage range and a high second voltage range. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2021065772A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2021065772A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2021065772A13</originalsourceid><addsrcrecordid>eNrjZFD2dfX1D4pUCPcM8VBwifRz9PV0Vgjz9wlxdHdVCHZ29PH0c-dhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRoYGZqbm5kaOhsbEqQIA6MUjqw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MEMORY WITH DYNAMIC VOLTAGE SCALING</title><source>esp@cenet</source><creator>MOLL, Laurent Rene ; CHUN, Dexter Tamio ; LELOUP, Xavier Loic ; SUH, Jungwon ; LO, Michael Hawjing</creator><creatorcontrib>MOLL, Laurent Rene ; CHUN, Dexter Tamio ; LELOUP, Xavier Loic ; SUH, Jungwon ; LO, Michael Hawjing</creatorcontrib><description>Methods and apparatuses for to memories using dynamic voltage scaling are presented. The apparatus includes memory configured to communicate with a host. The memory includes a peripheral portion and a memory array. The memory is further configured to receive, from at least one power management circuit, a first supply voltage and a second supply voltage. The memory further includes a switch circuit. The switch circuit is configured to selectively provide the first supply voltage and the second supply voltage to the peripheral portion. The first supply voltage is static and has a first voltage range. The second supply voltage has a low second voltage range and a high second voltage range.</description><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210304&DB=EPODOC&CC=US&NR=2021065772A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210304&DB=EPODOC&CC=US&NR=2021065772A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MOLL, Laurent Rene</creatorcontrib><creatorcontrib>CHUN, Dexter Tamio</creatorcontrib><creatorcontrib>LELOUP, Xavier Loic</creatorcontrib><creatorcontrib>SUH, Jungwon</creatorcontrib><creatorcontrib>LO, Michael Hawjing</creatorcontrib><title>MEMORY WITH DYNAMIC VOLTAGE SCALING</title><description>Methods and apparatuses for to memories using dynamic voltage scaling are presented. The apparatus includes memory configured to communicate with a host. The memory includes a peripheral portion and a memory array. The memory is further configured to receive, from at least one power management circuit, a first supply voltage and a second supply voltage. The memory further includes a switch circuit. The switch circuit is configured to selectively provide the first supply voltage and the second supply voltage to the peripheral portion. The first supply voltage is static and has a first voltage range. The second supply voltage has a low second voltage range and a high second voltage range.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFD2dfX1D4pUCPcM8VBwifRz9PV0Vgjz9wlxdHdVCHZ29PH0c-dhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRoYGZqbm5kaOhsbEqQIA6MUjqw</recordid><startdate>20210304</startdate><enddate>20210304</enddate><creator>MOLL, Laurent Rene</creator><creator>CHUN, Dexter Tamio</creator><creator>LELOUP, Xavier Loic</creator><creator>SUH, Jungwon</creator><creator>LO, Michael Hawjing</creator><scope>EVB</scope></search><sort><creationdate>20210304</creationdate><title>MEMORY WITH DYNAMIC VOLTAGE SCALING</title><author>MOLL, Laurent Rene ; CHUN, Dexter Tamio ; LELOUP, Xavier Loic ; SUH, Jungwon ; LO, Michael Hawjing</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2021065772A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2021</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>MOLL, Laurent Rene</creatorcontrib><creatorcontrib>CHUN, Dexter Tamio</creatorcontrib><creatorcontrib>LELOUP, Xavier Loic</creatorcontrib><creatorcontrib>SUH, Jungwon</creatorcontrib><creatorcontrib>LO, Michael Hawjing</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MOLL, Laurent Rene</au><au>CHUN, Dexter Tamio</au><au>LELOUP, Xavier Loic</au><au>SUH, Jungwon</au><au>LO, Michael Hawjing</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MEMORY WITH DYNAMIC VOLTAGE SCALING</title><date>2021-03-04</date><risdate>2021</risdate><abstract>Methods and apparatuses for to memories using dynamic voltage scaling are presented. The apparatus includes memory configured to communicate with a host. The memory includes a peripheral portion and a memory array. The memory is further configured to receive, from at least one power management circuit, a first supply voltage and a second supply voltage. The memory further includes a switch circuit. The switch circuit is configured to selectively provide the first supply voltage and the second supply voltage to the peripheral portion. The first supply voltage is static and has a first voltage range. The second supply voltage has a low second voltage range and a high second voltage range.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2021065772A1 |
source | esp@cenet |
subjects | INFORMATION STORAGE PHYSICS STATIC STORES |
title | MEMORY WITH DYNAMIC VOLTAGE SCALING |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-26T07%3A45%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MOLL,%20Laurent%20Rene&rft.date=2021-03-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2021065772A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |