PROCESSING DEVICE WITH A MICRO-BRANCH TARGET BUFFER FOR BRANCH PREDICTION

An integrated circuit comprising instruction processing circuitry for processing a plurality of program instructions and instruction prediction circuitry. The instruction prediction circuitry comprises circuitry for detecting successive occurrences of a same program loop sequence of program instruct...

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Hauptverfasser: Gauvreau, Paul Daniel, Chirca, Kai, Smith, JR., David Edward
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creator Gauvreau, Paul Daniel
Chirca, Kai
Smith, JR., David Edward
description An integrated circuit comprising instruction processing circuitry for processing a plurality of program instructions and instruction prediction circuitry. The instruction prediction circuitry comprises circuitry for detecting successive occurrences of a same program loop sequence of program instructions. The instruction prediction circuitry also comprises circuitry for predicting a number of iterations of the same program loop sequence of program instructions, in response to detecting, by the circuitry for detecting, that a second occurrence of the same program loop sequence of program instructions comprises a same number of iterations as a first occurrence of the same program loop sequence of program instructions.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2020379764A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2020379764A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2020379764A13</originalsourceid><addsrcrecordid>eNrjZPAMCPJ3dg0O9vRzV3BxDfN0dlUI9wzxUHBU8PV0DvLXdQpy9HP2UAhxDHJ3DVFwCnVzcw1ScPMPUoBKBAS5ung6h3j6-_EwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUkvjQYCMDIwNjc0tzMxNHQ2PiVAEAx4kt2g</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PROCESSING DEVICE WITH A MICRO-BRANCH TARGET BUFFER FOR BRANCH PREDICTION</title><source>esp@cenet</source><creator>Gauvreau, Paul Daniel ; Chirca, Kai ; Smith, JR., David Edward</creator><creatorcontrib>Gauvreau, Paul Daniel ; Chirca, Kai ; Smith, JR., David Edward</creatorcontrib><description>An integrated circuit comprising instruction processing circuitry for processing a plurality of program instructions and instruction prediction circuitry. The instruction prediction circuitry comprises circuitry for detecting successive occurrences of a same program loop sequence of program instructions. The instruction prediction circuitry also comprises circuitry for predicting a number of iterations of the same program loop sequence of program instructions, in response to detecting, by the circuitry for detecting, that a second occurrence of the same program loop sequence of program instructions comprises a same number of iterations as a first occurrence of the same program loop sequence of program instructions.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20201203&amp;DB=EPODOC&amp;CC=US&amp;NR=2020379764A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20201203&amp;DB=EPODOC&amp;CC=US&amp;NR=2020379764A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Gauvreau, Paul Daniel</creatorcontrib><creatorcontrib>Chirca, Kai</creatorcontrib><creatorcontrib>Smith, JR., David Edward</creatorcontrib><title>PROCESSING DEVICE WITH A MICRO-BRANCH TARGET BUFFER FOR BRANCH PREDICTION</title><description>An integrated circuit comprising instruction processing circuitry for processing a plurality of program instructions and instruction prediction circuitry. The instruction prediction circuitry comprises circuitry for detecting successive occurrences of a same program loop sequence of program instructions. The instruction prediction circuitry also comprises circuitry for predicting a number of iterations of the same program loop sequence of program instructions, in response to detecting, by the circuitry for detecting, that a second occurrence of the same program loop sequence of program instructions comprises a same number of iterations as a first occurrence of the same program loop sequence of program instructions.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAMCPJ3dg0O9vRzV3BxDfN0dlUI9wzxUHBU8PV0DvLXdQpy9HP2UAhxDHJ3DVFwCnVzcw1ScPMPUoBKBAS5ung6h3j6-_EwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUkvjQYCMDIwNjc0tzMxNHQ2PiVAEAx4kt2g</recordid><startdate>20201203</startdate><enddate>20201203</enddate><creator>Gauvreau, Paul Daniel</creator><creator>Chirca, Kai</creator><creator>Smith, JR., David Edward</creator><scope>EVB</scope></search><sort><creationdate>20201203</creationdate><title>PROCESSING DEVICE WITH A MICRO-BRANCH TARGET BUFFER FOR BRANCH PREDICTION</title><author>Gauvreau, Paul Daniel ; Chirca, Kai ; Smith, JR., David Edward</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2020379764A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2020</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Gauvreau, Paul Daniel</creatorcontrib><creatorcontrib>Chirca, Kai</creatorcontrib><creatorcontrib>Smith, JR., David Edward</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Gauvreau, Paul Daniel</au><au>Chirca, Kai</au><au>Smith, JR., David Edward</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PROCESSING DEVICE WITH A MICRO-BRANCH TARGET BUFFER FOR BRANCH PREDICTION</title><date>2020-12-03</date><risdate>2020</risdate><abstract>An integrated circuit comprising instruction processing circuitry for processing a plurality of program instructions and instruction prediction circuitry. The instruction prediction circuitry comprises circuitry for detecting successive occurrences of a same program loop sequence of program instructions. The instruction prediction circuitry also comprises circuitry for predicting a number of iterations of the same program loop sequence of program instructions, in response to detecting, by the circuitry for detecting, that a second occurrence of the same program loop sequence of program instructions comprises a same number of iterations as a first occurrence of the same program loop sequence of program instructions.</abstract><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title PROCESSING DEVICE WITH A MICRO-BRANCH TARGET BUFFER FOR BRANCH PREDICTION
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-11T10%3A24%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Gauvreau,%20Paul%20Daniel&rft.date=2020-12-03&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2020379764A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true