BRANCH PREDICTION THROUGHPUT BY SKIPPING OVER CACHELINES WITHOUT BRANCHES

BRANCH PREDICTION THROUGHPUT BY SKIPPING OVER CACHELINES WITHOUT BRANCHES

According to one general aspect, an apparatus may include a branch prediction circuit configured to predict if a branch instruction will be taken or not. The apparatus may include a branch target buffer circuit configured to store a memory segment empty flag that indicates whether or not the memory...

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Hauptverfasser: CHANGWATCHAI, Wichaya Top, NGO, Anhdung, GOVINDAN, Madhu Saravana Sibi, ZOU, Fuzhou, TKACZYK, Monika, ZURASKI, JR., Gerald David
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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creator CHANGWATCHAI, Wichaya Top
NGO, Anhdung
GOVINDAN, Madhu Saravana Sibi
ZOU, Fuzhou
TKACZYK, Monika
ZURASKI, JR., Gerald David
description According to one general aspect, an apparatus may include a branch prediction circuit configured to predict if a branch instruction will be taken or not. The apparatus may include a branch target buffer circuit configured to store a memory segment empty flag that indicates whether or not the memory segment after a target address includes at least one other branch instruction, wherein the memory segment empty flag was created during a commit stage of a prior occurrence of the branch instruction. The branch prediction circuit may be configured to skip over the memory segment if the memory segment empty flag indicates a lack of other branch instruction(s).
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title BRANCH PREDICTION THROUGHPUT BY SKIPPING OVER CACHELINES WITHOUT BRANCHES
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