CIRCUIT ARRANGEMENT FOR COMBINED PROTECTION OF A LOAD FROM TEMPORARY AND TRANSIENT OVERVOLTAGES
The invention relates to a circuit arrangement for combined protection of a load from temporary and transient overvoltages with emergency operation of the load in the presence of a temporary overvoltage and with integrated follow current limitation, wherein a first surge arrester, in particular a sp...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Brocke, Ralph Schork, Franz |
| description | The invention relates to a circuit arrangement for combined protection of a load from temporary and transient overvoltages with emergency operation of the load in the presence of a temporary overvoltage and with integrated follow current limitation, wherein a first surge arrester, in particular a spark gap or a varistor, is provided between network-side input terminals and a second surge arrester, in particular a varistor, is provided between load-side output terminals for follow current limitation. According to the invention, at least one controlled semiconductor switch is provided in each case in the series branch between the input terminal and the output terminal and in the output-side parallel branch, wherein a mechanical switch and a series capacitance are connected in parallel with the semiconductor switch in the series branch. Furthermore, the semiconductor switch in the parallel branch is part of a series circuit comprising a parallel circuit comprising a second surge arrester and a parallel capacitance. A series inductance is provided in the series branch between the input terminal and the parallel circuit comprising the series capacitance, the controlled semiconductor switch and the mechanical switch. A microcontroller for controlling the semiconductor switches is also present, wherein the microcontroller is connected to a current detector in the series branch. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2020366089A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2020366089A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2020366089A13</originalsourceid><addsrcrecordid>eNqNy8EKgkAQgGEvHaJ6h4HOgSlIHad11hbcHRlHoZNIbKcowd6fCnqATv_l_5bJYJyYzimgCIaKPAUFywKG_ckFKqERVjLqOABbQKgZS7DCHpR8w4JyAQwl6Me37su5J-m5VqyoXSeL23if4-bXVbK1pOa8i9NziPM0XuMjvoauzdIszYsiPRxxn_93vQEsyDRR</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>CIRCUIT ARRANGEMENT FOR COMBINED PROTECTION OF A LOAD FROM TEMPORARY AND TRANSIENT OVERVOLTAGES</title><source>esp@cenet</source><creator>Brocke, Ralph ; Schork, Franz</creator><creatorcontrib>Brocke, Ralph ; Schork, Franz</creatorcontrib><description>The invention relates to a circuit arrangement for combined protection of a load from temporary and transient overvoltages with emergency operation of the load in the presence of a temporary overvoltage and with integrated follow current limitation, wherein a first surge arrester, in particular a spark gap or a varistor, is provided between network-side input terminals and a second surge arrester, in particular a varistor, is provided between load-side output terminals for follow current limitation. According to the invention, at least one controlled semiconductor switch is provided in each case in the series branch between the input terminal and the output terminal and in the output-side parallel branch, wherein a mechanical switch and a series capacitance are connected in parallel with the semiconductor switch in the series branch. Furthermore, the semiconductor switch in the parallel branch is part of a series circuit comprising a parallel circuit comprising a second surge arrester and a parallel capacitance. A series inductance is provided in the series branch between the input terminal and the parallel circuit comprising the series capacitance, the controlled semiconductor switch and the mechanical switch. A microcontroller for controlling the semiconductor switches is also present, wherein the microcontroller is connected to a current detector in the series branch.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; BASIC ELECTRONIC CIRCUITRY ; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ; ELECTRICITY ; EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS ; GENERATION ; INDUCTANCES ; MAGNETS ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; PULSE TECHNIQUE ; RESISTORS ; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES ; TESTING ; TRANSFORMERS</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20201119&DB=EPODOC&CC=US&NR=2020366089A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20201119&DB=EPODOC&CC=US&NR=2020366089A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Brocke, Ralph</creatorcontrib><creatorcontrib>Schork, Franz</creatorcontrib><title>CIRCUIT ARRANGEMENT FOR COMBINED PROTECTION OF A LOAD FROM TEMPORARY AND TRANSIENT OVERVOLTAGES</title><description>The invention relates to a circuit arrangement for combined protection of a load from temporary and transient overvoltages with emergency operation of the load in the presence of a temporary overvoltage and with integrated follow current limitation, wherein a first surge arrester, in particular a spark gap or a varistor, is provided between network-side input terminals and a second surge arrester, in particular a varistor, is provided between load-side output terminals for follow current limitation. According to the invention, at least one controlled semiconductor switch is provided in each case in the series branch between the input terminal and the output terminal and in the output-side parallel branch, wherein a mechanical switch and a series capacitance are connected in parallel with the semiconductor switch in the series branch. Furthermore, the semiconductor switch in the parallel branch is part of a series circuit comprising a parallel circuit comprising a second surge arrester and a parallel capacitance. A series inductance is provided in the series branch between the input terminal and the parallel circuit comprising the series capacitance, the controlled semiconductor switch and the mechanical switch. A microcontroller for controlling the semiconductor switches is also present, wherein the microcontroller is connected to a current detector in the series branch.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</subject><subject>ELECTRICITY</subject><subject>EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS</subject><subject>GENERATION</subject><subject>INDUCTANCES</subject><subject>MAGNETS</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>PULSE TECHNIQUE</subject><subject>RESISTORS</subject><subject>SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES</subject><subject>TESTING</subject><subject>TRANSFORMERS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNy8EKgkAQgGEvHaJ6h4HOgSlIHad11hbcHRlHoZNIbKcowd6fCnqATv_l_5bJYJyYzimgCIaKPAUFywKG_ckFKqERVjLqOABbQKgZS7DCHpR8w4JyAQwl6Me37su5J-m5VqyoXSeL23if4-bXVbK1pOa8i9NziPM0XuMjvoauzdIszYsiPRxxn_93vQEsyDRR</recordid><startdate>20201119</startdate><enddate>20201119</enddate><creator>Brocke, Ralph</creator><creator>Schork, Franz</creator><scope>EVB</scope></search><sort><creationdate>20201119</creationdate><title>CIRCUIT ARRANGEMENT FOR COMBINED PROTECTION OF A LOAD FROM TEMPORARY AND TRANSIENT OVERVOLTAGES</title><author>Brocke, Ralph ; Schork, Franz</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2020366089A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2020</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</topic><topic>ELECTRICITY</topic><topic>EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS</topic><topic>GENERATION</topic><topic>INDUCTANCES</topic><topic>MAGNETS</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>PULSE TECHNIQUE</topic><topic>RESISTORS</topic><topic>SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES</topic><topic>TESTING</topic><topic>TRANSFORMERS</topic><toplevel>online_resources</toplevel><creatorcontrib>Brocke, Ralph</creatorcontrib><creatorcontrib>Schork, Franz</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Brocke, Ralph</au><au>Schork, Franz</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>CIRCUIT ARRANGEMENT FOR COMBINED PROTECTION OF A LOAD FROM TEMPORARY AND TRANSIENT OVERVOLTAGES</title><date>2020-11-19</date><risdate>2020</risdate><abstract>The invention relates to a circuit arrangement for combined protection of a load from temporary and transient overvoltages with emergency operation of the load in the presence of a temporary overvoltage and with integrated follow current limitation, wherein a first surge arrester, in particular a spark gap or a varistor, is provided between network-side input terminals and a second surge arrester, in particular a varistor, is provided between load-side output terminals for follow current limitation. According to the invention, at least one controlled semiconductor switch is provided in each case in the series branch between the input terminal and the output terminal and in the output-side parallel branch, wherein a mechanical switch and a series capacitance are connected in parallel with the semiconductor switch in the series branch. Furthermore, the semiconductor switch in the parallel branch is part of a series circuit comprising a parallel circuit comprising a second surge arrester and a parallel capacitance. A series inductance is provided in the series branch between the input terminal and the parallel circuit comprising the series capacitance, the controlled semiconductor switch and the mechanical switch. A microcontroller for controlling the semiconductor switches is also present, wherein the microcontroller is connected to a current detector in the series branch.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US2020366089A1 |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS BASIC ELECTRONIC CIRCUITRY CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ELECTRICITY EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS GENERATION INDUCTANCES MAGNETS MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS PULSE TECHNIQUE RESISTORS SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES TESTING TRANSFORMERS |
| title | CIRCUIT ARRANGEMENT FOR COMBINED PROTECTION OF A LOAD FROM TEMPORARY AND TRANSIENT OVERVOLTAGES |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-30T13%3A56%3A33IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Brocke,%20Ralph&rft.date=2020-11-19&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2020366089A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |