LEARNING-BASED ANALYZER FOR MITIGATING LATCH-UP IN INTEGRATED CIRCUITS

Systems and methods related to learning-based analyzers (both supervised and unsupervised) for mitigating latch-up in integrated circuits are provided. An example method includes obtaining latch-up data concerning at least one integrated circuit configured to operate under a range of temperature con...

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Bibliographische Detailangaben

Hauptverfasser:	Gifford, David R, Parris, Patrice M, Lienhard, Bernd
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS COMPUTING COUNTING PHYSICS
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