ARITHMETIC PROCESSOR AND CONTROL METHOD FOR ARITHMETIC PROCESSOR
One aspect of the present disclosure relates to an arithmetic processor including a detection unit that detects instruction information, wherein an instruction including a processing instruction to be performed after completion of DMA (Direct Memory Access) in a DMA request instruction is described...
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| creator | YAMAUCHI, Takuya KANEKO, Hiroya TAKAHASHI, Kohei |
| description | One aspect of the present disclosure relates to an arithmetic processor including a detection unit that detects instruction information, wherein an instruction including a processing instruction to be performed after completion of DMA (Direct Memory Access) in a DMA request instruction is described in the instruction information and a data processing unit that uses data transferred by the DMA request instruction to execute an operation corresponding to the processing instruction based on the instruction information detected by the detection unit. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2020293473A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2020293473A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2020293473A13</originalsourceid><addsrcrecordid>eNrjZHBwDPIM8fB1DfF0VggI8nd2DQ72D1Jw9HNRcPb3Cwny91EAynn4uyi4gYSxqOVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGQGhpbGJu7GhoTJwqAH2yK-s</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>ARITHMETIC PROCESSOR AND CONTROL METHOD FOR ARITHMETIC PROCESSOR</title><source>esp@cenet</source><creator>YAMAUCHI, Takuya ; KANEKO, Hiroya ; TAKAHASHI, Kohei</creator><creatorcontrib>YAMAUCHI, Takuya ; KANEKO, Hiroya ; TAKAHASHI, Kohei</creatorcontrib><description>One aspect of the present disclosure relates to an arithmetic processor including a detection unit that detects instruction information, wherein an instruction including a processing instruction to be performed after completion of DMA (Direct Memory Access) in a DMA request instruction is described in the instruction information and a data processing unit that uses data transferred by the DMA request instruction to execute an operation corresponding to the processing instruction based on the instruction information detected by the detection unit.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200917&DB=EPODOC&CC=US&NR=2020293473A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200917&DB=EPODOC&CC=US&NR=2020293473A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YAMAUCHI, Takuya</creatorcontrib><creatorcontrib>KANEKO, Hiroya</creatorcontrib><creatorcontrib>TAKAHASHI, Kohei</creatorcontrib><title>ARITHMETIC PROCESSOR AND CONTROL METHOD FOR ARITHMETIC PROCESSOR</title><description>One aspect of the present disclosure relates to an arithmetic processor including a detection unit that detects instruction information, wherein an instruction including a processing instruction to be performed after completion of DMA (Direct Memory Access) in a DMA request instruction is described in the instruction information and a data processing unit that uses data transferred by the DMA request instruction to execute an operation corresponding to the processing instruction based on the instruction information detected by the detection unit.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHBwDPIM8fB1DfF0VggI8nd2DQ72D1Jw9HNRcPb3Cwny91EAynn4uyi4gYSxqOVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGQGhpbGJu7GhoTJwqAH2yK-s</recordid><startdate>20200917</startdate><enddate>20200917</enddate><creator>YAMAUCHI, Takuya</creator><creator>KANEKO, Hiroya</creator><creator>TAKAHASHI, Kohei</creator><scope>EVB</scope></search><sort><creationdate>20200917</creationdate><title>ARITHMETIC PROCESSOR AND CONTROL METHOD FOR ARITHMETIC PROCESSOR</title><author>YAMAUCHI, Takuya ; KANEKO, Hiroya ; TAKAHASHI, Kohei</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2020293473A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2020</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>YAMAUCHI, Takuya</creatorcontrib><creatorcontrib>KANEKO, Hiroya</creatorcontrib><creatorcontrib>TAKAHASHI, Kohei</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YAMAUCHI, Takuya</au><au>KANEKO, Hiroya</au><au>TAKAHASHI, Kohei</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ARITHMETIC PROCESSOR AND CONTROL METHOD FOR ARITHMETIC PROCESSOR</title><date>2020-09-17</date><risdate>2020</risdate><abstract>One aspect of the present disclosure relates to an arithmetic processor including a detection unit that detects instruction information, wherein an instruction including a processing instruction to be performed after completion of DMA (Direct Memory Access) in a DMA request instruction is described in the instruction information and a data processing unit that uses data transferred by the DMA request instruction to execute an operation corresponding to the processing instruction based on the instruction information detected by the detection unit.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | ARITHMETIC PROCESSOR AND CONTROL METHOD FOR ARITHMETIC PROCESSOR |
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