System and Method of Asymmetric System Description for Optimized Scheduling
An information handling system includes processors disposed in sockets, and interconnect links providing point-to-point links between the sockets. One of the processors determines an arrangement of the processors, memories and the interconnect links, and determines a value for each of the processors...
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description | An information handling system includes processors disposed in sockets, and interconnect links providing point-to-point links between the sockets. One of the processors determines an arrangement of the processors, memories and the interconnect links, and determines a value for each of the processors, each of the memories, and each of the interconnect links. The processor calculates interconnect link bandwidth values for each of the interconnect links based at least in part on the determined value and the arrangement of the processors, the memories and the interconnect links. The processor also populates an interconnect bandwidth table using the interconnect link bandwidth values. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2020226093A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2020226093A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2020226093A13</originalsourceid><addsrcrecordid>eNrjZPAOriwuSc1VSMxLUfBNLcnIT1HIT1NwLK7MzU0tKcpMVoDKu6QWJxdlFpRk5ucppOUXKfgDmbmZVakpCsHJGakppTmZeek8DKxpiTnFqbxQmptB2c01xNlDN7UgPz61uCAxOTUvtSQ-NNjIAAiNzAwsjR0NjYlTBQAlXDZR</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>System and Method of Asymmetric System Description for Optimized Scheduling</title><source>esp@cenet</source><creator>Butcher, Andrew ; Berke, Stuart Allen</creator><creatorcontrib>Butcher, Andrew ; Berke, Stuart Allen</creatorcontrib><description>An information handling system includes processors disposed in sockets, and interconnect links providing point-to-point links between the sockets. One of the processors determines an arrangement of the processors, memories and the interconnect links, and determines a value for each of the processors, each of the memories, and each of the interconnect links. The processor calculates interconnect link bandwidth values for each of the interconnect links based at least in part on the determined value and the arrangement of the processors, the memories and the interconnect links. The processor also populates an interconnect bandwidth table using the interconnect link bandwidth values.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; PHYSICS ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200716&DB=EPODOC&CC=US&NR=2020226093A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200716&DB=EPODOC&CC=US&NR=2020226093A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Butcher, Andrew</creatorcontrib><creatorcontrib>Berke, Stuart Allen</creatorcontrib><title>System and Method of Asymmetric System Description for Optimized Scheduling</title><description>An information handling system includes processors disposed in sockets, and interconnect links providing point-to-point links between the sockets. One of the processors determines an arrangement of the processors, memories and the interconnect links, and determines a value for each of the processors, each of the memories, and each of the interconnect links. The processor calculates interconnect link bandwidth values for each of the interconnect links based at least in part on the determined value and the arrangement of the processors, the memories and the interconnect links. The processor also populates an interconnect bandwidth table using the interconnect link bandwidth values.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAOriwuSc1VSMxLUfBNLcnIT1HIT1NwLK7MzU0tKcpMVoDKu6QWJxdlFpRk5ucppOUXKfgDmbmZVakpCsHJGakppTmZeek8DKxpiTnFqbxQmptB2c01xNlDN7UgPz61uCAxOTUvtSQ-NNjIAAiNzAwsjR0NjYlTBQAlXDZR</recordid><startdate>20200716</startdate><enddate>20200716</enddate><creator>Butcher, Andrew</creator><creator>Berke, Stuart Allen</creator><scope>EVB</scope></search><sort><creationdate>20200716</creationdate><title>System and Method of Asymmetric System Description for Optimized Scheduling</title><author>Butcher, Andrew ; Berke, Stuart Allen</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2020226093A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2020</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>Butcher, Andrew</creatorcontrib><creatorcontrib>Berke, Stuart Allen</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Butcher, Andrew</au><au>Berke, Stuart Allen</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>System and Method of Asymmetric System Description for Optimized Scheduling</title><date>2020-07-16</date><risdate>2020</risdate><abstract>An information handling system includes processors disposed in sockets, and interconnect links providing point-to-point links between the sockets. One of the processors determines an arrangement of the processors, memories and the interconnect links, and determines a value for each of the processors, each of the memories, and each of the interconnect links. The processor calculates interconnect link bandwidth values for each of the interconnect links based at least in part on the determined value and the arrangement of the processors, the memories and the interconnect links. The processor also populates an interconnect bandwidth table using the interconnect link bandwidth values.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
title | System and Method of Asymmetric System Description for Optimized Scheduling |
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