IMAGE SCALING

There is disclosed in one example a video processor, including: an input buffer to receive an input image; a slicer circuit to divide the input image into a plurality of N vertical slices; N parallel input buffers for de-rasterization; N parallel image scalers, wherein each scaler is hardware config...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: O'Connell, Niall D, SUGATHAN, Shreeja, VENKITASUBRAMANI, Anand, MURALIKRISHNA, Bhavana
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:There is disclosed in one example a video processor, including: an input buffer to receive an input image; a slicer circuit to divide the input image into a plurality of N vertical slices; N parallel input buffers for de-rasterization; N parallel image scalers, wherein each scaler is hardware configured to scale in a raster form, one of the N vertical slices according to an image scaling algorithm; N parallel output buffers for rerasteriztion; and an output multiplexer to combine the scaled vertical slices into a combined scaled output image.