CMOS INVERTER AND ARRAY SUBSTRATE

is a channel width-length ratio of the N-type metal-oxide TFT and the P-type low-temperature polysilicon TFT, respectively, μn and μP is a mobility of the N-type metal-oxide TFT and P-type low-temperature polysilicon TFT. The performance of the CMOS inverter could be improved and the manufacturing c...

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Bibliographische Detailangaben
Hauptverfasser: LU, Poyen, CHEN, Changdong, HSU, Yuanjun, LIU, Chuan, WU, Yuanchun, YANG, Boru, ZHOU, Xingyu, IM, Jangsoon
Format: Patent
Sprache:eng
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Zusammenfassung:is a channel width-length ratio of the N-type metal-oxide TFT and the P-type low-temperature polysilicon TFT, respectively, μn and μP is a mobility of the N-type metal-oxide TFT and P-type low-temperature polysilicon TFT. The performance of the CMOS inverter could be improved and the manufacturing complexity and cost of the CMOS could be reduced.