TEST STRUCTURE LEVERAGING THE LOWEST METALLIZATION LEVEL OF AN INTERCONNECT STRUCTURE

TEST STRUCTURE LEVERAGING THE LOWEST METALLIZATION LEVEL OF AN INTERCONNECT STRUCTURE

Structures for testing a field effect-transistor or Kelvin field-effect transistor, and methods of forming a structure for testing a field-effect transistor or Kelvin field-effect transistor. The structure includes a test pad, a device-under-testing having one or more source/drain regions, and a met...

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Bibliographische Detailangaben
Hauptverfasser: Sengupta, Prianka, Yang, Mankyu, Chauhan, Vikrant, Greene, Brian, Ogino, Atsushi, Vakada, Vara Govindeswara Reddy, Maciejewski, Edward
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:Structures for testing a field effect-transistor or Kelvin field-effect transistor, and methods of forming a structure for testing a field-effect transistor or Kelvin field-effect transistor. The structure includes a test pad, a device-under-testing having one or more source/drain regions, and a metallization level arranged over the device-under-testing. The metallization level includes one or more interconnect lines that are connected with the test pad. One or more contacts, which are arranged between the metallization level and the device-under-testing, directly connect the one or more interconnect lines with the one or more source/drain regions.