Barrier for Power Metallization in Semiconductor Devices

A semiconductor device includes a structured interlayer on a substrate, a structured power metallization on the structured interlayer, and a barrier on the structured power metallization. The barrier is configured to prevent diffusion of at least one of water, water ions, sodium ions, potassium ions...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Gatterbauer, Johann, Goller, Klaus, Albers, Katrin, Mais, Norbert, Busch, Joerg, Kolitsch, Marianne, Pelzer, Rainer, Weidgans, Bernhard, Nelhiebel, Michael
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES MICROSTRUCTURAL TECHNOLOGY PERFORMING OPERATIONS SEMICONDUCTOR DEVICES TRANSPORTING
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