Tiered-Profile Contact for Semiconductor
Tiered-profile contacts for semiconductor devices and techniques for formation thereof are provided In one aspect, a method for forming tiered-profile contacts to a semiconductor device includes: depositing a first oxide layer over the semiconductor device; depositing a second oxide layer on the fir...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Choi, Kisik Cheng, Kangguo |
description | Tiered-profile contacts for semiconductor devices and techniques for formation thereof are provided In one aspect, a method for forming tiered-profile contacts to a semiconductor device includes: depositing a first oxide layer over the semiconductor device; depositing a second oxide layer on the first oxide layer; patterning contact trenches through the first/second oxide layer down to the semiconductor device; isotropically etching a top portion of the contact trenches selective to a bottom portion of the contact trenches based on the second oxide layer having a greater etch rate than the first oxide layer to make the top portion of the contact trenches wider than the bottom portion; and filling the contact trenches with a contact metal(s) to form the tiered-profile contacts. Other methods to form tiered-profile contacts using sacrificial spacers as well as structures including the present tiered-profile contacts are also provided. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2020090995A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2020090995A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2020090995A13</originalsourceid><addsrcrecordid>eNrjZNAIyUwtSk3RDSjKT8vMSVVwzs8rSUwuUUjLL1IITs3NTM7PSylNLskv4mFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgZGBgaWBpaWpo6GxsSpAgBnLyk4</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Tiered-Profile Contact for Semiconductor</title><source>esp@cenet</source><creator>Choi, Kisik ; Cheng, Kangguo</creator><creatorcontrib>Choi, Kisik ; Cheng, Kangguo</creatorcontrib><description>Tiered-profile contacts for semiconductor devices and techniques for formation thereof are provided In one aspect, a method for forming tiered-profile contacts to a semiconductor device includes: depositing a first oxide layer over the semiconductor device; depositing a second oxide layer on the first oxide layer; patterning contact trenches through the first/second oxide layer down to the semiconductor device; isotropically etching a top portion of the contact trenches selective to a bottom portion of the contact trenches based on the second oxide layer having a greater etch rate than the first oxide layer to make the top portion of the contact trenches wider than the bottom portion; and filling the contact trenches with a contact metal(s) to form the tiered-profile contacts. Other methods to form tiered-profile contacts using sacrificial spacers as well as structures including the present tiered-profile contacts are also provided.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200319&DB=EPODOC&CC=US&NR=2020090995A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200319&DB=EPODOC&CC=US&NR=2020090995A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Choi, Kisik</creatorcontrib><creatorcontrib>Cheng, Kangguo</creatorcontrib><title>Tiered-Profile Contact for Semiconductor</title><description>Tiered-profile contacts for semiconductor devices and techniques for formation thereof are provided In one aspect, a method for forming tiered-profile contacts to a semiconductor device includes: depositing a first oxide layer over the semiconductor device; depositing a second oxide layer on the first oxide layer; patterning contact trenches through the first/second oxide layer down to the semiconductor device; isotropically etching a top portion of the contact trenches selective to a bottom portion of the contact trenches based on the second oxide layer having a greater etch rate than the first oxide layer to make the top portion of the contact trenches wider than the bottom portion; and filling the contact trenches with a contact metal(s) to form the tiered-profile contacts. Other methods to form tiered-profile contacts using sacrificial spacers as well as structures including the present tiered-profile contacts are also provided.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAIyUwtSk3RDSjKT8vMSVVwzs8rSUwuUUjLL1IITs3NTM7PSylNLskv4mFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgZGBgaWBpaWpo6GxsSpAgBnLyk4</recordid><startdate>20200319</startdate><enddate>20200319</enddate><creator>Choi, Kisik</creator><creator>Cheng, Kangguo</creator><scope>EVB</scope></search><sort><creationdate>20200319</creationdate><title>Tiered-Profile Contact for Semiconductor</title><author>Choi, Kisik ; Cheng, Kangguo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2020090995A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2020</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Choi, Kisik</creatorcontrib><creatorcontrib>Cheng, Kangguo</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Choi, Kisik</au><au>Cheng, Kangguo</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Tiered-Profile Contact for Semiconductor</title><date>2020-03-19</date><risdate>2020</risdate><abstract>Tiered-profile contacts for semiconductor devices and techniques for formation thereof are provided In one aspect, a method for forming tiered-profile contacts to a semiconductor device includes: depositing a first oxide layer over the semiconductor device; depositing a second oxide layer on the first oxide layer; patterning contact trenches through the first/second oxide layer down to the semiconductor device; isotropically etching a top portion of the contact trenches selective to a bottom portion of the contact trenches based on the second oxide layer having a greater etch rate than the first oxide layer to make the top portion of the contact trenches wider than the bottom portion; and filling the contact trenches with a contact metal(s) to form the tiered-profile contacts. Other methods to form tiered-profile contacts using sacrificial spacers as well as structures including the present tiered-profile contacts are also provided.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2020090995A1 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Tiered-Profile Contact for Semiconductor |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-19T08%3A46%3A45IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Choi,%20Kisik&rft.date=2020-03-19&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2020090995A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |