REDUCING POWER AMPLIFIER GAIN DRIFT DURING A DATA BURST

A bias circuit provides additional bias current for power amplifiers during data bursts to compensate for the gain droop caused by a rise in the power amplifier temperature during the data burst. A bias circuit includes a difference amplifier and switches coupled to the difference amplifier. The swi...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Rabjohn, Gordon Glen, Whittaker, Edward John Wemyss
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Rabjohn, Gordon Glen
Whittaker, Edward John Wemyss
description A bias circuit provides additional bias current for power amplifiers during data bursts to compensate for the gain droop caused by a rise in the power amplifier temperature during the data burst. A bias circuit includes a difference amplifier and switches coupled to the difference amplifier. The switches operate the bias circuit in a first mode when a transmit data burst is detected and operate the bias circuit in a second mode after the bias circuit has operated in the first mode for a predetermined period of time. In the first mode, the bias circuit charges a storage capacitor and sets an output current to zero. In the second mode, the bias circuit outputs the output current that increases above the initial value of zero as the PA warms up, where the excursion of this increase of current is determined by a register. The switches disable the bias circuit when the transmit data burst ends.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2020036403A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2020036403A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2020036403A13</originalsourceid><addsrcrecordid>eNrjZDAPcnUJdfb0c1cI8A93DVJw9A3w8XTzBLLcHT39FFyCPN1CFFxCg0AqHBVcHEMcFZxCg4JDeBhY0xJzilN5oTQ3g7Kba4izh25qQX58anFBYnJqXmpJfGiwkYGRgYGxmYmBsaOhMXGqALseKL0</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>REDUCING POWER AMPLIFIER GAIN DRIFT DURING A DATA BURST</title><source>esp@cenet</source><creator>Rabjohn, Gordon Glen ; Whittaker, Edward John Wemyss</creator><creatorcontrib>Rabjohn, Gordon Glen ; Whittaker, Edward John Wemyss</creatorcontrib><description>A bias circuit provides additional bias current for power amplifiers during data bursts to compensate for the gain droop caused by a rise in the power amplifier temperature during the data burst. A bias circuit includes a difference amplifier and switches coupled to the difference amplifier. The switches operate the bias circuit in a first mode when a transmit data burst is detected and operate the bias circuit in a second mode after the bias circuit has operated in the first mode for a predetermined period of time. In the first mode, the bias circuit charges a storage capacitor and sets an output current to zero. In the second mode, the bias circuit outputs the output current that increases above the initial value of zero as the PA warms up, where the excursion of this increase of current is determined by a register. The switches disable the bias circuit when the transmit data burst ends.</description><language>eng</language><subject>AMPLIFIERS ; BASIC ELECTRONIC CIRCUITRY ; CONTROL OF AMPLIFICATION ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; TRANSMISSION</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20200130&amp;DB=EPODOC&amp;CC=US&amp;NR=2020036403A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20200130&amp;DB=EPODOC&amp;CC=US&amp;NR=2020036403A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Rabjohn, Gordon Glen</creatorcontrib><creatorcontrib>Whittaker, Edward John Wemyss</creatorcontrib><title>REDUCING POWER AMPLIFIER GAIN DRIFT DURING A DATA BURST</title><description>A bias circuit provides additional bias current for power amplifiers during data bursts to compensate for the gain droop caused by a rise in the power amplifier temperature during the data burst. A bias circuit includes a difference amplifier and switches coupled to the difference amplifier. The switches operate the bias circuit in a first mode when a transmit data burst is detected and operate the bias circuit in a second mode after the bias circuit has operated in the first mode for a predetermined period of time. In the first mode, the bias circuit charges a storage capacitor and sets an output current to zero. In the second mode, the bias circuit outputs the output current that increases above the initial value of zero as the PA warms up, where the excursion of this increase of current is determined by a register. The switches disable the bias circuit when the transmit data burst ends.</description><subject>AMPLIFIERS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CONTROL OF AMPLIFICATION</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>TRANSMISSION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAPcnUJdfb0c1cI8A93DVJw9A3w8XTzBLLcHT39FFyCPN1CFFxCg0AqHBVcHEMcFZxCg4JDeBhY0xJzilN5oTQ3g7Kba4izh25qQX58anFBYnJqXmpJfGiwkYGRgYGxmYmBsaOhMXGqALseKL0</recordid><startdate>20200130</startdate><enddate>20200130</enddate><creator>Rabjohn, Gordon Glen</creator><creator>Whittaker, Edward John Wemyss</creator><scope>EVB</scope></search><sort><creationdate>20200130</creationdate><title>REDUCING POWER AMPLIFIER GAIN DRIFT DURING A DATA BURST</title><author>Rabjohn, Gordon Glen ; Whittaker, Edward John Wemyss</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2020036403A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2020</creationdate><topic>AMPLIFIERS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CONTROL OF AMPLIFICATION</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>TRANSMISSION</topic><toplevel>online_resources</toplevel><creatorcontrib>Rabjohn, Gordon Glen</creatorcontrib><creatorcontrib>Whittaker, Edward John Wemyss</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Rabjohn, Gordon Glen</au><au>Whittaker, Edward John Wemyss</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>REDUCING POWER AMPLIFIER GAIN DRIFT DURING A DATA BURST</title><date>2020-01-30</date><risdate>2020</risdate><abstract>A bias circuit provides additional bias current for power amplifiers during data bursts to compensate for the gain droop caused by a rise in the power amplifier temperature during the data burst. A bias circuit includes a difference amplifier and switches coupled to the difference amplifier. The switches operate the bias circuit in a first mode when a transmit data burst is detected and operate the bias circuit in a second mode after the bias circuit has operated in the first mode for a predetermined period of time. In the first mode, the bias circuit charges a storage capacitor and sets an output current to zero. In the second mode, the bias circuit outputs the output current that increases above the initial value of zero as the PA warms up, where the excursion of this increase of current is determined by a register. The switches disable the bias circuit when the transmit data burst ends.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2020036403A1
source esp@cenet
subjects AMPLIFIERS
BASIC ELECTRONIC CIRCUITRY
CONTROL OF AMPLIFICATION
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION
title REDUCING POWER AMPLIFIER GAIN DRIFT DURING A DATA BURST
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-05T18%3A18%3A05IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Rabjohn,%20Gordon%20Glen&rft.date=2020-01-30&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2020036403A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true