MULTI-LEVEL MEMORY SAFETY OF A SENSOR INTEGRATED CIRCUIT

A method for multi-level memory safety for a sensor integrated circuit can include loading a blocking bit into a volatile memory from a non-volatile memory and providing the blocking bit to a gating circuit from the volatile memory. Further, the method may include the gating circuit determining whet...

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Bibliographische Detailangaben
Hauptverfasser:	Alpago, Octavio H, Rigoni, Nicolas, Biberidis, Nicolas Rafael
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS STATIC STORES TESTING
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Beschreibung
Zusammenfassung:	A method for multi-level memory safety for a sensor integrated circuit can include loading a blocking bit into a volatile memory from a non-volatile memory and providing the blocking bit to a gating circuit from the volatile memory. Further, the method may include the gating circuit determining whether to provide a default value to a functional logic based upon the provided blocking bit.