APPARATUS AND METHOD FOR DETECTING AND RECOVERING FROM DATA FETCH ERRORS
An apparatus and method are described for detecting and correcting data fetch errors within a processor core. For example, one embodiment of an instruction processing apparatus for detecting and recovering from data fetch errors comprises: at least one processor core having a plurality of instructio...
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| creator | Santhanakrishnan, Geeyarpuram N Cohen, Ehud Kumar, Mohan J Mishaeli, Michael Vargas, Jose A Shafi, Hisham Raikin, Shlomo Srinivasa, Ganapati N Mandelblat, Julius Y Yigzaw, Theodros Sperber, Zeev |
| description | An apparatus and method are described for detecting and correcting data fetch errors within a processor core. For example, one embodiment of an instruction processing apparatus for detecting and recovering from data fetch errors comprises: at least one processor core having a plurality of instruction processing stages including a data fetch stage and a retirement stage; and error processing logic in communication with the processing stages to perform the operations of: detecting an error associated with data in response to a data fetch operation performed by the data fetch stage; and responsively performing one or more operations to ensure that the error does not corrupt an architectural state of the processor core within the retirement stage. |
| format | Patent |
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For example, one embodiment of an instruction processing apparatus for detecting and recovering from data fetch errors comprises: at least one processor core having a plurality of instruction processing stages including a data fetch stage and a retirement stage; and error processing logic in communication with the processing stages to perform the operations of: detecting an error associated with data in response to a data fetch operation performed by the data fetch stage; and responsively performing one or more operations to ensure that the error does not corrupt an architectural state of the processor core within the retirement stage.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200102&DB=EPODOC&CC=US&NR=2020004633A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200102&DB=EPODOC&CC=US&NR=2020004633A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Santhanakrishnan, Geeyarpuram N</creatorcontrib><creatorcontrib>Cohen, Ehud</creatorcontrib><creatorcontrib>Kumar, Mohan J</creatorcontrib><creatorcontrib>Mishaeli, Michael</creatorcontrib><creatorcontrib>Vargas, Jose A</creatorcontrib><creatorcontrib>Shafi, Hisham</creatorcontrib><creatorcontrib>Raikin, Shlomo</creatorcontrib><creatorcontrib>Srinivasa, Ganapati N</creatorcontrib><creatorcontrib>Mandelblat, Julius Y</creatorcontrib><creatorcontrib>Yigzaw, Theodros</creatorcontrib><creatorcontrib>Sperber, Zeev</creatorcontrib><title>APPARATUS AND METHOD FOR DETECTING AND RECOVERING FROM DATA FETCH ERRORS</title><description>An apparatus and method are described for detecting and correcting data fetch errors within a processor core. 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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | APPARATUS AND METHOD FOR DETECTING AND RECOVERING FROM DATA FETCH ERRORS |
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