POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
The power semiconductor device includes: a first trench gate and a second trench gate in a stripe shape extending in one direction in parallel and spaced apart from each other in a substrate; a third trench gate in a ladder shape extending in a direction different from the one direction between the...
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| creator | Park, Tae Young Kim, Tae Youp Kim, Young Joon Jo, Seon-hyeong Woo, Hyuk LEE, Ju Hwan Kang, Min Gi Ha, Jeong Mok Yun, Seong-hwan |
| description | The power semiconductor device includes: a first trench gate and a second trench gate in a stripe shape extending in one direction in parallel and spaced apart from each other in a substrate; a third trench gate in a ladder shape extending in a direction different from the one direction between the first trench gate and the second trench gate in the substrate; a first conductive type body area each disposed between the first trench gate, the second trench gate and the third trench gate, respectively, in the substrate; a pair of first conductive type floating first areas surrounding each of bottom surfaces and at least one side of the first trench gate and the second trench gate in the substrate; and a first conductive type floating second area surrounding a bottom surface of the third trench gate in the substrate. |
| format | Patent |
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a third trench gate in a ladder shape extending in a direction different from the one direction between the first trench gate and the second trench gate in the substrate; a first conductive type body area each disposed between the first trench gate, the second trench gate and the third trench gate, respectively, in the substrate; a pair of first conductive type floating first areas surrounding each of bottom surfaces and at least one side of the first trench gate and the second trench gate in the substrate; and a first conductive type floating second area surrounding a bottom surface of the third trench gate in the substrate.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAO8A93DVIIdvX1dPb3cwl1DvEPUnBxDfN0dlVw9HNR8HX0C3VzdA4JDfL0c1fwdQ3x8HdRCPFwDXL1d-NhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhpbGlsbGhmaOhsbEqQIAm9wqcQ</recordid><startdate>20191226</startdate><enddate>20191226</enddate><creator>Park, Tae Young</creator><creator>Kim, Tae Youp</creator><creator>Kim, Young Joon</creator><creator>Jo, Seon-hyeong</creator><creator>Woo, Hyuk</creator><creator>LEE, Ju Hwan</creator><creator>Kang, Min Gi</creator><creator>Ha, Jeong Mok</creator><creator>Yun, Seong-hwan</creator><scope>EVB</scope></search><sort><creationdate>20191226</creationdate><title>POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF</title><author>Park, Tae Young ; Kim, Tae Youp ; Kim, Young Joon ; Jo, Seon-hyeong ; Woo, Hyuk ; LEE, Ju Hwan ; Kang, Min Gi ; Ha, Jeong Mok ; Yun, Seong-hwan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2019393316A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2019</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Park, Tae Young</creatorcontrib><creatorcontrib>Kim, Tae Youp</creatorcontrib><creatorcontrib>Kim, Young Joon</creatorcontrib><creatorcontrib>Jo, Seon-hyeong</creatorcontrib><creatorcontrib>Woo, Hyuk</creatorcontrib><creatorcontrib>LEE, Ju Hwan</creatorcontrib><creatorcontrib>Kang, Min Gi</creatorcontrib><creatorcontrib>Ha, Jeong Mok</creatorcontrib><creatorcontrib>Yun, Seong-hwan</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Park, Tae Young</au><au>Kim, Tae Youp</au><au>Kim, Young Joon</au><au>Jo, Seon-hyeong</au><au>Woo, Hyuk</au><au>LEE, Ju Hwan</au><au>Kang, Min Gi</au><au>Ha, Jeong Mok</au><au>Yun, Seong-hwan</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF</title><date>2019-12-26</date><risdate>2019</risdate><abstract>The power semiconductor device includes: a first trench gate and a second trench gate in a stripe shape extending in one direction in parallel and spaced apart from each other in a substrate; a third trench gate in a ladder shape extending in a direction different from the one direction between the first trench gate and the second trench gate in the substrate; a first conductive type body area each disposed between the first trench gate, the second trench gate and the third trench gate, respectively, in the substrate; a pair of first conductive type floating first areas surrounding each of bottom surfaces and at least one side of the first trench gate and the second trench gate in the substrate; and a first conductive type floating second area surrounding a bottom surface of the third trench gate in the substrate.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF |
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