WRITE LEVEL OPTIMIZATION FOR NON-VOLATILE MEMORY

WRITE LEVEL OPTIMIZATION FOR NON-VOLATILE MEMORY

The disclosure relates in some aspects to optimizing writes levels used for programming a non-volatile memory device. In some aspects, the disclosure relates to an algorithmic approach for adjusting write levels for a NAND flash device. For example, write level gradients may be iteratively generated...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Ravindran, Niranjay, Galbraith, Richard Leo, Goode, Jonas Andrew
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:The disclosure relates in some aspects to optimizing writes levels used for programming a non-volatile memory device. In some aspects, the disclosure relates to an algorithmic approach for adjusting write levels for a NAND flash device. For example, write level gradients may be iteratively generated based on memory cell bin distribution statistics relating to the number and direction of errors across bin boundaries.