FLIP CHIP INTEGRATED CIRCUIT PACKAGES WITH SPACERS
In a described example, an apparatus includes a semiconductor substrate and at least two pillar bumps formed on an active surface of the semiconductor substrate, the at least two pillar bumps extending away from the active surface and having ends spaced from the semiconductor substrate with solder m...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Guevara, Rafael Jose Lizares Baello, James Raymond Maliclic |
| description | In a described example, an apparatus includes a semiconductor substrate and at least two pillar bumps formed on an active surface of the semiconductor substrate, the at least two pillar bumps extending away from the active surface and having ends spaced from the semiconductor substrate with solder material at the ends of the at least two pillar bumps. At least one spacer is formed on the active surface of the semiconductor substrate, the at least one spacer extending a predetermined distance from the active surface of the semiconductor substrate. A package substrate has a die mount area on a first surface including portions receiving the ends of the at least two pillar bumps and receiving an end of the at least one spacer. Mold compound covers the semiconductor substrate, the at least two pillars, the at least one spacer, and at least a portion of the semiconductor substrate. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2019326245A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2019326245A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2019326245A13</originalsourceid><addsrcrecordid>eNrjZDBy8_EMUHD2ABKefiGu7kGOIa4uCs6eQc6hniEKAY7O3o7ursEK4Z4hHgrBQK5rUDAPA2taYk5xKi-U5mZQdnMNcfbQTS3Ij08tLkhMTs1LLYkPDTYyMLQ0NjIzMjF1NDQmThUAA4onpg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>FLIP CHIP INTEGRATED CIRCUIT PACKAGES WITH SPACERS</title><source>esp@cenet</source><creator>Guevara, Rafael Jose Lizares ; Baello, James Raymond Maliclic</creator><creatorcontrib>Guevara, Rafael Jose Lizares ; Baello, James Raymond Maliclic</creatorcontrib><description>In a described example, an apparatus includes a semiconductor substrate and at least two pillar bumps formed on an active surface of the semiconductor substrate, the at least two pillar bumps extending away from the active surface and having ends spaced from the semiconductor substrate with solder material at the ends of the at least two pillar bumps. At least one spacer is formed on the active surface of the semiconductor substrate, the at least one spacer extending a predetermined distance from the active surface of the semiconductor substrate. A package substrate has a die mount area on a first surface including portions receiving the ends of the at least two pillar bumps and receiving an end of the at least one spacer. Mold compound covers the semiconductor substrate, the at least two pillars, the at least one spacer, and at least a portion of the semiconductor substrate.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191024&DB=EPODOC&CC=US&NR=2019326245A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191024&DB=EPODOC&CC=US&NR=2019326245A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Guevara, Rafael Jose Lizares</creatorcontrib><creatorcontrib>Baello, James Raymond Maliclic</creatorcontrib><title>FLIP CHIP INTEGRATED CIRCUIT PACKAGES WITH SPACERS</title><description>In a described example, an apparatus includes a semiconductor substrate and at least two pillar bumps formed on an active surface of the semiconductor substrate, the at least two pillar bumps extending away from the active surface and having ends spaced from the semiconductor substrate with solder material at the ends of the at least two pillar bumps. At least one spacer is formed on the active surface of the semiconductor substrate, the at least one spacer extending a predetermined distance from the active surface of the semiconductor substrate. A package substrate has a die mount area on a first surface including portions receiving the ends of the at least two pillar bumps and receiving an end of the at least one spacer. Mold compound covers the semiconductor substrate, the at least two pillars, the at least one spacer, and at least a portion of the semiconductor substrate.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDBy8_EMUHD2ABKefiGu7kGOIa4uCs6eQc6hniEKAY7O3o7ursEK4Z4hHgrBQK5rUDAPA2taYk5xKi-U5mZQdnMNcfbQTS3Ij08tLkhMTs1LLYkPDTYyMLQ0NjIzMjF1NDQmThUAA4onpg</recordid><startdate>20191024</startdate><enddate>20191024</enddate><creator>Guevara, Rafael Jose Lizares</creator><creator>Baello, James Raymond Maliclic</creator><scope>EVB</scope></search><sort><creationdate>20191024</creationdate><title>FLIP CHIP INTEGRATED CIRCUIT PACKAGES WITH SPACERS</title><author>Guevara, Rafael Jose Lizares ; Baello, James Raymond Maliclic</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2019326245A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2019</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Guevara, Rafael Jose Lizares</creatorcontrib><creatorcontrib>Baello, James Raymond Maliclic</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Guevara, Rafael Jose Lizares</au><au>Baello, James Raymond Maliclic</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>FLIP CHIP INTEGRATED CIRCUIT PACKAGES WITH SPACERS</title><date>2019-10-24</date><risdate>2019</risdate><abstract>In a described example, an apparatus includes a semiconductor substrate and at least two pillar bumps formed on an active surface of the semiconductor substrate, the at least two pillar bumps extending away from the active surface and having ends spaced from the semiconductor substrate with solder material at the ends of the at least two pillar bumps. At least one spacer is formed on the active surface of the semiconductor substrate, the at least one spacer extending a predetermined distance from the active surface of the semiconductor substrate. A package substrate has a die mount area on a first surface including portions receiving the ends of the at least two pillar bumps and receiving an end of the at least one spacer. Mold compound covers the semiconductor substrate, the at least two pillars, the at least one spacer, and at least a portion of the semiconductor substrate.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US2019326245A1 |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | FLIP CHIP INTEGRATED CIRCUIT PACKAGES WITH SPACERS |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-26T19%3A13%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Guevara,%20Rafael%20Jose%20Lizares&rft.date=2019-10-24&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2019326245A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |