WARM BOOT ATTACK MITIGATIONS FOR NON-VOLATILE MEMORY MODULES
Technologies disclosed herein provide mitigations against warm boot attacks on memory modules. For instance, in one embodiment, a non-volatile dual in-line memory module (NVDIMM) in a host computing system may detect a transition from a low-power state to a full-power state, receive a nonce value fr...
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creator | Altman, Asher M Datta, Sham M Trikalinou, Anna Grooms, John K Lake, Daniel S |
description | Technologies disclosed herein provide mitigations against warm boot attacks on memory modules. For instance, in one embodiment, a non-volatile dual in-line memory module (NVDIMM) in a host computing system may detect a transition from a low-power state to a full-power state, receive a nonce value from a processor of the host computing system after the transition, verify the nonce value, and allow access to data stored on the NVDIMM based on successful verification of the nonce value. In another embodiment, an NVDIMM may be locked in response to detecting a transition from a high-power state to a low-power state in a host computing system. After a transition from the low-power state to the full-power state, the NVDIMM may obtain one or more passphrases, verify the one or more passphrases, and allow access to data stored on the NVDIMM based on successful verification of the one or more passphrases. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2019325142A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2019325142A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2019325142A13</originalsourceid><addsrcrecordid>eNrjZLAJdwzyVXDy9w9RcAwJcXT2VvD1DPF0dwzx9PcLVnDzD1Lw8_fTDfP3AYr4uCr4uvr6B0Uq-Pq7hPq4BvMwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUkvjQYCMDQ0tjI1NDEyNHQ2PiVAEAv8gqrQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>WARM BOOT ATTACK MITIGATIONS FOR NON-VOLATILE MEMORY MODULES</title><source>esp@cenet</source><creator>Altman, Asher M ; Datta, Sham M ; Trikalinou, Anna ; Grooms, John K ; Lake, Daniel S</creator><creatorcontrib>Altman, Asher M ; Datta, Sham M ; Trikalinou, Anna ; Grooms, John K ; Lake, Daniel S</creatorcontrib><description>Technologies disclosed herein provide mitigations against warm boot attacks on memory modules. For instance, in one embodiment, a non-volatile dual in-line memory module (NVDIMM) in a host computing system may detect a transition from a low-power state to a full-power state, receive a nonce value from a processor of the host computing system after the transition, verify the nonce value, and allow access to data stored on the NVDIMM based on successful verification of the nonce value. In another embodiment, an NVDIMM may be locked in response to detecting a transition from a high-power state to a low-power state in a host computing system. After a transition from the low-power state to the full-power state, the NVDIMM may obtain one or more passphrases, verify the one or more passphrases, and allow access to data stored on the NVDIMM based on successful verification of the one or more passphrases.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191024&DB=EPODOC&CC=US&NR=2019325142A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25569,76552</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191024&DB=EPODOC&CC=US&NR=2019325142A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Altman, Asher M</creatorcontrib><creatorcontrib>Datta, Sham M</creatorcontrib><creatorcontrib>Trikalinou, Anna</creatorcontrib><creatorcontrib>Grooms, John K</creatorcontrib><creatorcontrib>Lake, Daniel S</creatorcontrib><title>WARM BOOT ATTACK MITIGATIONS FOR NON-VOLATILE MEMORY MODULES</title><description>Technologies disclosed herein provide mitigations against warm boot attacks on memory modules. For instance, in one embodiment, a non-volatile dual in-line memory module (NVDIMM) in a host computing system may detect a transition from a low-power state to a full-power state, receive a nonce value from a processor of the host computing system after the transition, verify the nonce value, and allow access to data stored on the NVDIMM based on successful verification of the nonce value. In another embodiment, an NVDIMM may be locked in response to detecting a transition from a high-power state to a low-power state in a host computing system. After a transition from the low-power state to the full-power state, the NVDIMM may obtain one or more passphrases, verify the one or more passphrases, and allow access to data stored on the NVDIMM based on successful verification of the one or more passphrases.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAJdwzyVXDy9w9RcAwJcXT2VvD1DPF0dwzx9PcLVnDzD1Lw8_fTDfP3AYr4uCr4uvr6B0Uq-Pq7hPq4BvMwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUkvjQYCMDQ0tjI1NDEyNHQ2PiVAEAv8gqrQ</recordid><startdate>20191024</startdate><enddate>20191024</enddate><creator>Altman, Asher M</creator><creator>Datta, Sham M</creator><creator>Trikalinou, Anna</creator><creator>Grooms, John K</creator><creator>Lake, Daniel S</creator><scope>EVB</scope></search><sort><creationdate>20191024</creationdate><title>WARM BOOT ATTACK MITIGATIONS FOR NON-VOLATILE MEMORY MODULES</title><author>Altman, Asher M ; Datta, Sham M ; Trikalinou, Anna ; Grooms, John K ; Lake, Daniel S</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2019325142A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2019</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Altman, Asher M</creatorcontrib><creatorcontrib>Datta, Sham M</creatorcontrib><creatorcontrib>Trikalinou, Anna</creatorcontrib><creatorcontrib>Grooms, John K</creatorcontrib><creatorcontrib>Lake, Daniel S</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Altman, Asher M</au><au>Datta, Sham M</au><au>Trikalinou, Anna</au><au>Grooms, John K</au><au>Lake, Daniel S</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>WARM BOOT ATTACK MITIGATIONS FOR NON-VOLATILE MEMORY MODULES</title><date>2019-10-24</date><risdate>2019</risdate><abstract>Technologies disclosed herein provide mitigations against warm boot attacks on memory modules. For instance, in one embodiment, a non-volatile dual in-line memory module (NVDIMM) in a host computing system may detect a transition from a low-power state to a full-power state, receive a nonce value from a processor of the host computing system after the transition, verify the nonce value, and allow access to data stored on the NVDIMM based on successful verification of the nonce value. In another embodiment, an NVDIMM may be locked in response to detecting a transition from a high-power state to a low-power state in a host computing system. After a transition from the low-power state to the full-power state, the NVDIMM may obtain one or more passphrases, verify the one or more passphrases, and allow access to data stored on the NVDIMM based on successful verification of the one or more passphrases.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | WARM BOOT ATTACK MITIGATIONS FOR NON-VOLATILE MEMORY MODULES |
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