METHOD AND APPARATUS FOR IMPROVING BOOLEAN SATISFIBILITY SOLVER GENERATED BASED ON INPUT DESIGN WITH DATA QUALIFIER SIGNALS

METHOD AND APPARATUS FOR IMPROVING BOOLEAN SATISFIBILITY SOLVER GENERATED BASED ON INPUT DESIGN WITH DATA QUALIFIER SIGNALS

Embodiments are disclosed for solving a Boolean formula generated from an input design using an iterative loop using a computer-implemented Boolean satisfiability solver. An example method includes accessing data qualifier signals indicating one or more variables in a Boolean formula. The example me...

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Hauptverfasser: MELLER, Yael, ARMONI, Roy, DAVIDI, Or
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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creator MELLER, Yael
ARMONI, Roy
DAVIDI, Or
description Embodiments are disclosed for solving a Boolean formula generated from an input design using an iterative loop using a computer-implemented Boolean satisfiability solver. An example method includes accessing data qualifier signals indicating one or more variables in a Boolean formula. The example method further includes marking the one or more variables in the Boolean formula as data qualifier variables based on the respective data qualifier signals. The example method further includes instructing a computer implemented Boolean satisfiability solver to solve the Boolean formula using an iterative loop, where operation of the iterative loop is prioritized based on the data qualifier variables. Corresponding apparatuses and non-transitory computer readable storage media are also provided.
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title METHOD AND APPARATUS FOR IMPROVING BOOLEAN SATISFIBILITY SOLVER GENERATED BASED ON INPUT DESIGN WITH DATA QUALIFIER SIGNALS
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