SEPARATE DATA REGISTERS AND CACHE REGISTERS IN MEMORY

Implementations disclosed herein include a system and method of storing one or more data and program data in a memory, temporarily storing the one or more data and the program data in a cache, managing the one or more data from the memory and the cache in a read data register and a read cache regist...

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1. Verfasser:	Jagtap, Sachin Sudhir
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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creator	Jagtap, Sachin Sudhir
description	Implementations disclosed herein include a system and method of storing one or more data and program data in a memory, temporarily storing the one or more data and the program data in a cache, managing the one or more data from the memory and the cache in a read data register and a read cache register, and managing the program data from the memory and the cache in a program data register and a program cache register, wherein each of the read data register and the read cache register are separate from the program data register and the program cache register. Read operations are performed only with the read data register and the read cache register. Program operations are performed only with the program data register and the program cache register.
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Read operations are performed only with the read data register and the read cache register. Program operations are performed only with the program data register and the program cache register.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191003&DB=EPODOC&CC=US&NR=2019303296A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191003&DB=EPODOC&CC=US&NR=2019303296A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Jagtap, Sachin Sudhir</creatorcontrib><title>SEPARATE DATA REGISTERS AND CACHE REGISTERS IN MEMORY</title><description>Implementations disclosed herein include a system and method of storing one or more data and program data in a memory, temporarily storing the one or more data and the program data in a cache, managing the one or more data from the memory and the cache in a read data register and a read cache register, and managing the program data from the memory and the cache in a program data register and a program cache register, wherein each of the read data register and the read cache register are separate from the program data register and the program cache register. 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Read operations are performed only with the read data register and the read cache register. Program operations are performed only with the program data register and the program cache register.</abstract><oa>free_for_read</oa></addata></record>
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subjects	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
title	SEPARATE DATA REGISTERS AND CACHE REGISTERS IN MEMORY
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