MEMORY DEVICES AND MEMORY PACKAGES
A memory device includes a plurality of receivers that each include a first input terminal coupled to one pin of a plurality of input/output pins. The memory devices further includes a transmitter having an output terminal coupled to the first input terminals of the plurality of receivers. The memor...
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creator | KIM, Wang Soo SUNG, Yoo Chang LEE, Jun Ha JEON, Ju Ho CHOI, Jung Hwan HEO, Jin Seok |
description | A memory device includes a plurality of receivers that each include a first input terminal coupled to one pin of a plurality of input/output pins. The memory devices further includes a transmitter having an output terminal coupled to the first input terminals of the plurality of receivers. The memory device further includes a control circuit configured to control the transmitter to output a particular test signal. The plurality of receivers are each configured to generate output data based on receiving the particular test signal from the transmitter. The control circuit is further configured to adjust the plurality of receivers based on the output data generated by the plurality of receivers and received at the control circuit from the plurality of receivers. |
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The memory devices further includes a transmitter having an output terminal coupled to the first input terminals of the plurality of receivers. The memory device further includes a control circuit configured to control the transmitter to output a particular test signal. The plurality of receivers are each configured to generate output data based on receiving the particular test signal from the transmitter. The control circuit is further configured to adjust the plurality of receivers based on the output data generated by the plurality of receivers and received at the control circuit from the plurality of receivers.</description><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190725&DB=EPODOC&CC=US&NR=2019228832A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190725&DB=EPODOC&CC=US&NR=2019228832A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KIM, Wang Soo</creatorcontrib><creatorcontrib>SUNG, Yoo Chang</creatorcontrib><creatorcontrib>LEE, Jun Ha</creatorcontrib><creatorcontrib>JEON, Ju Ho</creatorcontrib><creatorcontrib>CHOI, Jung Hwan</creatorcontrib><creatorcontrib>HEO, Jin Seok</creatorcontrib><title>MEMORY DEVICES AND MEMORY PACKAGES</title><description>A memory device includes a plurality of receivers that each include a first input terminal coupled to one pin of a plurality of input/output pins. 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The memory devices further includes a transmitter having an output terminal coupled to the first input terminals of the plurality of receivers. The memory device further includes a control circuit configured to control the transmitter to output a particular test signal. The plurality of receivers are each configured to generate output data based on receiving the particular test signal from the transmitter. The control circuit is further configured to adjust the plurality of receivers based on the output data generated by the plurality of receivers and received at the control circuit from the plurality of receivers.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | INFORMATION STORAGE PHYSICS STATIC STORES |
title | MEMORY DEVICES AND MEMORY PACKAGES |
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