APPARATUS FOR MEMORY BUILT-IN SELF-TEST WITH ERROR DETECTION AND CORRECTION CODE AWARENESS

Technologies for built-in self-testing of a memory array using error detection and correction code knowledge include identifying data errors between pseudo random data written to the memory array and the data read back from the memory array and ignoring those data errors determined to be correctable...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Azam, Asad, Gopal, R Selvakumar Raja, Chen, Kaitlyn
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Technologies for built-in self-testing of a memory array using error detection and correction code knowledge include identifying data errors between pseudo random data written to the memory array and the data read back from the memory array and ignoring those data errors determined to be correctable. The data errors may be determined to be correctable if an error corrector circuit can correct those errors or if the number of errors per memory chuck is less than a number of errors correctable by the error correct circuit.