METHOD AND APPARATUS FOR REDUCING OUTPUT VOLTAGE RIPPLE IN HYSTERETIC BOOST OR BUCK-BOOST CONVERTER

An apparatus and method for reducing an output voltage ripple of a converter are provided. The apparatus may include a controller for controlling a converter, wherein the controller may include a clock generating circuit that generates a periodic clock signal containing periodic clock pulses, and a...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Tirumala, Rohit, Salcedo, Miguel A, Ho, Tommy, Lee, Fu-Ho
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Tirumala, Rohit
Salcedo, Miguel A
Ho, Tommy
Lee, Fu-Ho
description An apparatus and method for reducing an output voltage ripple of a converter are provided. The apparatus may include a controller for controlling a converter, wherein the controller may include a clock generating circuit that generates a periodic clock signal containing periodic clock pulses, and a control circuit that causes the clock generating circuit to asynchronously initiate a clock pulse based on a difference between a feedback voltage of the converter and a reference voltage. The apparatus may also include an on-time modulation circuit which modulates the on-time based on the difference between the reference voltage and the sampled output voltage.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2019222110A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2019222110A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2019222110A13</originalsourceid><addsrcrecordid>eNqNi7EKwjAURbs4iPoPD5wLTZwc0_S1Dda8kLwUnEopcRIt1P_Hgn6Aw-Vw4NxtNl2RW6pA2XXOKa84BqjJg8cqamMboMguMvTUsWoQvHGuQzAW2ltg9MhGQ0kUGNZXGfUl_5om26Nfi322uY-PJR1-3GXHGlm3eZpfQ1rmcUrP9B5ikIU4SymFKJQ4_Vd9AA1KNWY</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>METHOD AND APPARATUS FOR REDUCING OUTPUT VOLTAGE RIPPLE IN HYSTERETIC BOOST OR BUCK-BOOST CONVERTER</title><source>esp@cenet</source><creator>Tirumala, Rohit ; Salcedo, Miguel A ; Ho, Tommy ; Lee, Fu-Ho</creator><creatorcontrib>Tirumala, Rohit ; Salcedo, Miguel A ; Ho, Tommy ; Lee, Fu-Ho</creatorcontrib><description>An apparatus and method for reducing an output voltage ripple of a converter are provided. The apparatus may include a controller for controlling a converter, wherein the controller may include a clock generating circuit that generates a periodic clock signal containing periodic clock pulses, and a control circuit that causes the clock generating circuit to asynchronously initiate a clock pulse based on a difference between a feedback voltage of the converter and a reference voltage. The apparatus may also include an on-time modulation circuit which modulates the on-time based on the difference between the reference voltage and the sampled output voltage.</description><language>eng</language><subject>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS ; CONTROL OR REGULATION THEREOF ; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER ; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ; ELECTRICITY ; GENERATION</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20190718&amp;DB=EPODOC&amp;CC=US&amp;NR=2019222110A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25547,76298</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20190718&amp;DB=EPODOC&amp;CC=US&amp;NR=2019222110A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Tirumala, Rohit</creatorcontrib><creatorcontrib>Salcedo, Miguel A</creatorcontrib><creatorcontrib>Ho, Tommy</creatorcontrib><creatorcontrib>Lee, Fu-Ho</creatorcontrib><title>METHOD AND APPARATUS FOR REDUCING OUTPUT VOLTAGE RIPPLE IN HYSTERETIC BOOST OR BUCK-BOOST CONVERTER</title><description>An apparatus and method for reducing an output voltage ripple of a converter are provided. The apparatus may include a controller for controlling a converter, wherein the controller may include a clock generating circuit that generates a periodic clock signal containing periodic clock pulses, and a control circuit that causes the clock generating circuit to asynchronously initiate a clock pulse based on a difference between a feedback voltage of the converter and a reference voltage. The apparatus may also include an on-time modulation circuit which modulates the on-time based on the difference between the reference voltage and the sampled output voltage.</description><subject>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS</subject><subject>CONTROL OR REGULATION THEREOF</subject><subject>CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER</subject><subject>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</subject><subject>ELECTRICITY</subject><subject>GENERATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNi7EKwjAURbs4iPoPD5wLTZwc0_S1Dda8kLwUnEopcRIt1P_Hgn6Aw-Vw4NxtNl2RW6pA2XXOKa84BqjJg8cqamMboMguMvTUsWoQvHGuQzAW2ltg9MhGQ0kUGNZXGfUl_5om26Nfi322uY-PJR1-3GXHGlm3eZpfQ1rmcUrP9B5ikIU4SymFKJQ4_Vd9AA1KNWY</recordid><startdate>20190718</startdate><enddate>20190718</enddate><creator>Tirumala, Rohit</creator><creator>Salcedo, Miguel A</creator><creator>Ho, Tommy</creator><creator>Lee, Fu-Ho</creator><scope>EVB</scope></search><sort><creationdate>20190718</creationdate><title>METHOD AND APPARATUS FOR REDUCING OUTPUT VOLTAGE RIPPLE IN HYSTERETIC BOOST OR BUCK-BOOST CONVERTER</title><author>Tirumala, Rohit ; Salcedo, Miguel A ; Ho, Tommy ; Lee, Fu-Ho</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2019222110A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2019</creationdate><topic>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS</topic><topic>CONTROL OR REGULATION THEREOF</topic><topic>CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER</topic><topic>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</topic><topic>ELECTRICITY</topic><topic>GENERATION</topic><toplevel>online_resources</toplevel><creatorcontrib>Tirumala, Rohit</creatorcontrib><creatorcontrib>Salcedo, Miguel A</creatorcontrib><creatorcontrib>Ho, Tommy</creatorcontrib><creatorcontrib>Lee, Fu-Ho</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tirumala, Rohit</au><au>Salcedo, Miguel A</au><au>Ho, Tommy</au><au>Lee, Fu-Ho</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>METHOD AND APPARATUS FOR REDUCING OUTPUT VOLTAGE RIPPLE IN HYSTERETIC BOOST OR BUCK-BOOST CONVERTER</title><date>2019-07-18</date><risdate>2019</risdate><abstract>An apparatus and method for reducing an output voltage ripple of a converter are provided. The apparatus may include a controller for controlling a converter, wherein the controller may include a clock generating circuit that generates a periodic clock signal containing periodic clock pulses, and a control circuit that causes the clock generating circuit to asynchronously initiate a clock pulse based on a difference between a feedback voltage of the converter and a reference voltage. The apparatus may also include an on-time modulation circuit which modulates the on-time based on the difference between the reference voltage and the sampled output voltage.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2019222110A1
source esp@cenet
subjects APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS
CONTROL OR REGULATION THEREOF
CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER
CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
ELECTRICITY
GENERATION
title METHOD AND APPARATUS FOR REDUCING OUTPUT VOLTAGE RIPPLE IN HYSTERETIC BOOST OR BUCK-BOOST CONVERTER
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-16T08%3A43%3A39IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Tirumala,%20Rohit&rft.date=2019-07-18&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2019222110A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true