DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT
A decoding method for a memory storage device including a rewritable non-volatile memory module is provided according to an exemplary embodiment of the invention. The method includes: reading at least one memory cells by using at least one read voltage level to obtain a codeword; performing a parity...
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| creator | Lai, Kuo-Hsin Yen, Shao-Wei Lin, Yu-Hsiang Yang, Cheng-Che |
| description | A decoding method for a memory storage device including a rewritable non-volatile memory module is provided according to an exemplary embodiment of the invention. The method includes: reading at least one memory cells by using at least one read voltage level to obtain a codeword; performing a parity check operation on the codeword by an error checking and correcting circuit to generate a syndrome sum corresponding to the codeword; and dynamically adjusting a first parameter used by the error checking and correcting circuit in a first decoding operation based on whether the syndrome sum is less than a first threshold value and performing the first decoding operation on the codeword by the error checking and correcting circuit by using the first parameter. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2019163567A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2019163567A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2019163567A13</originalsourceid><addsrcrecordid>eNrjZHBzcXX2d_H0c1fwdQ3x8HfRAdK-_kGRCsEh_kGO7q4KLq5hns6uCo5-LjAZZ3-_kCB_HwVnzyDnUM8QhVA_zxAeBta0xJziVF4ozc2g7OYa4uyhm1qQH59aXJCYnJqXWhIfGmxkYGhpaGZsambuaGhMnCoAUMgtOQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT</title><source>esp@cenet</source><creator>Lai, Kuo-Hsin ; Yen, Shao-Wei ; Lin, Yu-Hsiang ; Yang, Cheng-Che</creator><creatorcontrib>Lai, Kuo-Hsin ; Yen, Shao-Wei ; Lin, Yu-Hsiang ; Yang, Cheng-Che</creatorcontrib><description>A decoding method for a memory storage device including a rewritable non-volatile memory module is provided according to an exemplary embodiment of the invention. The method includes: reading at least one memory cells by using at least one read voltage level to obtain a codeword; performing a parity check operation on the codeword by an error checking and correcting circuit to generate a syndrome sum corresponding to the codeword; and dynamically adjusting a first parameter used by the error checking and correcting circuit in a first decoding operation based on whether the syndrome sum is less than a first threshold value and performing the first decoding operation on the codeword by the error checking and correcting circuit by using the first parameter.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CALCULATING ; CODE CONVERSION IN GENERAL ; CODING ; COMPUTING ; COUNTING ; DECODING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190530&DB=EPODOC&CC=US&NR=2019163567A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25547,76298</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190530&DB=EPODOC&CC=US&NR=2019163567A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Lai, Kuo-Hsin</creatorcontrib><creatorcontrib>Yen, Shao-Wei</creatorcontrib><creatorcontrib>Lin, Yu-Hsiang</creatorcontrib><creatorcontrib>Yang, Cheng-Che</creatorcontrib><title>DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT</title><description>A decoding method for a memory storage device including a rewritable non-volatile memory module is provided according to an exemplary embodiment of the invention. The method includes: reading at least one memory cells by using at least one read voltage level to obtain a codeword; performing a parity check operation on the codeword by an error checking and correcting circuit to generate a syndrome sum corresponding to the codeword; and dynamically adjusting a first parameter used by the error checking and correcting circuit in a first decoding operation based on whether the syndrome sum is less than a first threshold value and performing the first decoding operation on the codeword by the error checking and correcting circuit by using the first parameter.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CALCULATING</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>DECODING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHBzcXX2d_H0c1fwdQ3x8HfRAdK-_kGRCsEh_kGO7q4KLq5hns6uCo5-LjAZZ3-_kCB_HwVnzyDnUM8QhVA_zxAeBta0xJziVF4ozc2g7OYa4uyhm1qQH59aXJCYnJqXWhIfGmxkYGhpaGZsambuaGhMnCoAUMgtOQ</recordid><startdate>20190530</startdate><enddate>20190530</enddate><creator>Lai, Kuo-Hsin</creator><creator>Yen, Shao-Wei</creator><creator>Lin, Yu-Hsiang</creator><creator>Yang, Cheng-Che</creator><scope>EVB</scope></search><sort><creationdate>20190530</creationdate><title>DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT</title><author>Lai, Kuo-Hsin ; Yen, Shao-Wei ; Lin, Yu-Hsiang ; Yang, Cheng-Che</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2019163567A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2019</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CALCULATING</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>DECODING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>Lai, Kuo-Hsin</creatorcontrib><creatorcontrib>Yen, Shao-Wei</creatorcontrib><creatorcontrib>Lin, Yu-Hsiang</creatorcontrib><creatorcontrib>Yang, Cheng-Che</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lai, Kuo-Hsin</au><au>Yen, Shao-Wei</au><au>Lin, Yu-Hsiang</au><au>Yang, Cheng-Che</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT</title><date>2019-05-30</date><risdate>2019</risdate><abstract>A decoding method for a memory storage device including a rewritable non-volatile memory module is provided according to an exemplary embodiment of the invention. The method includes: reading at least one memory cells by using at least one read voltage level to obtain a codeword; performing a parity check operation on the codeword by an error checking and correcting circuit to generate a syndrome sum corresponding to the codeword; and dynamically adjusting a first parameter used by the error checking and correcting circuit in a first decoding operation based on whether the syndrome sum is less than a first threshold value and performing the first decoding operation on the codeword by the error checking and correcting circuit by using the first parameter.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRONIC CIRCUITRY CALCULATING CODE CONVERSION IN GENERAL CODING COMPUTING COUNTING DECODING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY INFORMATION STORAGE PHYSICS STATIC STORES |
| title | DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT |
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